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Contents

README

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ADS7853IPWR

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16

ADS7853IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AINP_A input Positive analog input channel A; input voltage within configured full-scale range (0 to VREF single-ended, -VREF/2 to VREF/2 pseudo-differential).
2 AINM_A input Negative analog input channel A; externally connect to GND (single-ended) or FSR_ADC_A/2 (pseudo-differential).
3 REFIO_A bidirectional Reference voltage input/output channel A; 2.495 to 2.505 V internal reference or 2.4 to 2.5 V external, requires 10 µF bypass capacitor to REFGND_A.
4 REFGND_A power_in Reference ground potential channel A; return path for REFIO_A with 10 µF decoupling capacitor.
5 REFGND_B power_in Reference ground potential channel B; return path for REFIO_B with 10 µF decoupling capacitor.
6 REFIO_B bidirectional Reference voltage input/output channel B; 2.495 to 2.505 V internal reference or 2.4 to 2.5 V external, requires 10 µF bypass capacitor to REFGND_B.
7 AINM_B input Negative analog input channel B; externally connect to GND (single-ended) or FSR_ADC_B/2 (pseudo-differential).
8 AINP_B input Positive analog input channel B; input voltage within configured full-scale range (0 to VREF single-ended, -VREF/2 to VREF/2 pseudo-differential).
9 DVDD power_in Digital I/O supply voltage 1.65 to 5.5 V; provides power to digital interface circuitry with 10 µF bypass to GND.
10 SDI input Serial data input; receives configuration register, REFDAC_A, and REFDAC_B data during serial frames.
11 CS input Chip-select input (active low); defines start and end of serial interface frames with minimum 40 ns high time between frames.
12 SCLK input Serial clock input; synchronizes data transfers with frequency range 1 to 20 MHz for 32-CLK mode or 1 to 34 MHz for 16-CLK mode.
13 SDO_A tri_state Serial data output A (tri-state, high-Z when CS high); outputs ADC_A conversion result or both ADC_A and ADC_B results depending on interface mode.
14 SDO_B tri_state Serial data output B (tri-state, high-Z when CS high); outputs ADC_B conversion result in dual-SDO mode or remains high-Z in single-SDO mode.
15 GND power_in Digital ground; reference potential for digital circuitry and must connect to PCB ground plane.
16 AVDD power_in Analog supply voltage 4.5 to 5.5 V (internal reference) or 5.0 to 5.5 V (external reference); provides power to analog circuits with 10 µF bypass to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: ADS7853IPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ads7853ipwr-etched.step / ads7853ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads7853ipwr.step / ads7853ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (75 pp, sha256 af6a120fbc8c3bae, retrieved 2026-09-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF