ADS7852Y

{
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  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Analog To Digital Converters (ADC), TQFP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "data acquisition",
    "ads7852y",
    "factory-2.0.0",
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  "component": {
    "mpn": "ADS7852Y",
    "manufacturer": "Texas Instruments",
    "package": "TQFP-32(5x5)",
    "pin_count": 32,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ads7852",
    "parts": {
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      "lbr": "ads7852y.lbr"
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    "distributor_links": {
      "lcsc": "C2651342"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T22:45:52Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
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    },
    "pins": [
      {
        "number": "1",
        "name": "AIN0",
        "type": "input",
        "description": "Single-ended analog input channel 0 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "2",
        "name": "AIN1",
        "type": "input",
        "description": "Single-ended analog input channel 1 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "3",
        "name": "AIN2",
        "type": "input",
        "description": "Single-ended analog input channel 2 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "4",
        "name": "AIN3",
        "type": "input",
        "description": "Single-ended analog input channel 3 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "5",
        "name": "AIN4",
        "type": "input",
        "description": "Single-ended analog input channel 4 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "6",
        "name": "AIN5",
        "type": "input",
        "description": "Single-ended analog input channel 5 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "7",
        "name": "AIN6",
        "type": "input",
        "description": "Single-ended analog input channel 6 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "8",
        "name": "AIN7",
        "type": "input",
        "description": "Single-ended analog input channel 7 of the 8-channel multiplexer; the input range is 0V to 2× the reference voltage (0V to 5V with the internal 2.5V reference)."
      },
      {
        "number": "9",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground, GND = 0V reference for the analog circuitry."
      },
      {
        "number": "10",
        "name": "VREF",
        "type": "power_in",
        "description": "Voltage reference input and output; the internal 2.5V reference is present here and can be overdriven by an external 2.0V to 2.55V reference, decoupled with 0.1µF ceramic plus 2.2µF tantalum."
      },
      {
        "number": "11",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground, GND = 0V."
      },
      {
        "number": "12",
        "name": "A2",
        "type": "input",
        "description": "Channel address bit 2 (channel select per the channel selection table), which must be stable at least 10ns before WR goes HIGH."
      },
      {
        "number": "13",
        "name": "A1",
        "type": "input",
        "description": "Channel address bit 1 (channel select per the channel selection table), which must be stable at least 10ns before WR goes HIGH; with RD it also controls power-down mode."
      },
      {
        "number": "14",
        "name": "A0",
        "type": "input",
        "description": "Channel address bit 0 (channel select per the channel selection table), which must be stable at least 10ns before WR goes HIGH; with RD it also controls power-down mode."
      },
      {
        "number": "15",
        "name": "DB11",
        "type": "tri_state",
        "description": "Data bit 11, the MSB of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "16",
        "name": "DB10",
        "type": "tri_state",
        "description": "Data bit 10 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "17",
        "name": "DB9",
        "type": "tri_state",
        "description": "Data bit 9 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "18",
        "name": "DB8",
        "type": "tri_state",
        "description": "Data bit 8 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "19",
        "name": "DB7",
        "type": "tri_state",
        "description": "Data bit 7 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "20",
        "name": "DB6",
        "type": "tri_state",
        "description": "Data bit 6 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "21",
        "name": "DB5",
        "type": "tri_state",
        "description": "Data bit 5 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "22",
        "name": "DB4",
        "type": "tri_state",
        "description": "Data bit 4 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "23",
        "name": "DB3",
        "type": "tri_state",
        "description": "Data bit 3 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "24",
        "name": "DB2",
        "type": "tri_state",
        "description": "Data bit 2 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "25",
        "name": "DB1",
        "type": "tri_state",
        "description": "Data bit 1 of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "26",
        "name": "DB0",
        "type": "tri_state",
        "description": "Data bit 0, the LSB of the straight-binary 12-bit conversion result, valid after BUSY rises and tri-stated when CS is HIGH."
      },
      {
        "number": "27",
        "name": "WR",
        "type": "input",
        "description": "Active-LOW write input; with CS LOW, its falling edge starts a conversion and its rising edge latches the channel address, with a minimum LOW time of 35ns."
      },
      {
        "number": "28",
        "name": "BUSY",
        "type": "output",
        "description": "Goes LOW during the conversion and returns HIGH when the conversion is complete, marking when output data is valid."
      },
      {
        "number": "29",
        "name": "CLK",
        "type": "input",
        "description": "External clock input that sets the conversion rate with fCLK = 16 × fSAMPLE; the clock may vary from 200kHz to 8MHz (500kHz throughput at 8MHz)."
      },
      {
        "number": "30",
        "name": "RD",
        "type": "input",
        "description": "Active-LOW read input that enables the data outputs with CS and, in conjunction with A0 or A1, places the device into nap or sleep power-down."
      },
      {
        "number": "31",
        "name": "CS",
        "type": "input",
        "description": "Active-LOW chip select; with WR LOW it initiates a new conversion, and when HIGH it places the data outputs in tri-state mode."
      },
      {
        "number": "32",
        "name": "VSS",
        "type": "power_in",
        "description": "Positive supply input, nominally +5V (specified 4.75V to 5.25V), decoupled with 0.1µF ceramic and 10µF tantalum capacitors."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The package hint says TQFP-32 (5x5), but the datasheet only gives 'TQFP-32 PBS' and no body dimensio; Clock timing is inconsistent in the datasheet: the Layout/Theory text says minimum HIGH and LOW time; The datasheet does not give a pin type for the analog inputs or the data bus; types were assigned fr"
        ],
        "pages_sent": 18,
        "cost_usd": 0.1079,
        "at": "2026-10-08T22:45:24"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ads7852",
        "pages": 18,
        "sha256": "72fd76e910225299",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}