component
ADS7841EB
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), SSOP-16-150mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdownADS7841EB
Texas Instruments · Analog To Digital Converters (ADCs) · SSOP-16-150mil
ADS7841EB from Texas Instruments, in a SSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | +VCC | power_in | Power supply input, 2.7 V to 5 V. Must be tied together with pin 9. Bypass with a low-ESR ceramic capacitor to GND. |
| 2 | CH0 | input | Analog input channel 0. Full-scale span 0 to VREF; absolute range -0.2 V to VCC+0.2 V. |
| 3 | CH1 | input | Analog input channel 1. Full-scale span 0 to VREF; absolute range -0.2 V to VCC+0.2 V. |
| 4 | CH2 | input | Analog input channel 2. Full-scale span 0 to VREF; absolute range -0.2 V to VCC+0.2 V. |
| 5 | CH3 | input | Analog input channel 3. Full-scale span 0 to VREF; absolute range -0.2 V to VCC+0.2 V. |
| 6 | COM | input | Ground reference for the analog inputs. Sets the zero-code voltage in single-ended mode; tie to ground or the local analog ground reference point. |
| 7 | /SHDN | input | Shutdown, active LOW. Driving this pin LOW places the device into a very low-power shutdown mode (<15 uW). Tie HIGH for normal operation. |
| 8 | VREF | input | External voltage reference input, 100 mV to VCC. Sets the full-scale conversion range. Bypass with a low-ESR ceramic capacitor to GND. |
| 9 | +VCC | power_in | Power supply input, 2.7 V to 5 V. Must be tied together with pin 1. Bypass with a low-ESR ceramic capacitor to GND. |
| 10 | GND | power_in | Device ground return. |
| 11 | MODE | input | Conversion mode select. When LOW, the device always performs a 12-bit conversion; when HIGH, resolution is set by the MODE bit in the control byte. |
| 12 | DOUT | tri_state | Serial data output. Data is shifted out on the falling edge of DCLK; high-impedance when /CS is HIGH. |
| 13 | BUSY | tri_state | Busy output. Indicates when a conversion is in progress; high-impedance when /CS is HIGH. |
| 14 | DIN | input | Serial data input. When /CS is LOW, DIN is latched on the rising edge of DCLK. |
| 15 | /CS | input | Chip select, active LOW. Controls conversion timing and enables the serial input/output register. |
| 16 | DCLK | input | External serial clock input, up to 3.2 MHz. Runs the SAR conversion process and synchronizes serial I/O. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-16-150mil |
| Category | ADC/DAC/Data Conversion |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
ADS7841EBADS7841EB/2K5ADS7841E/2K5ADS7841ESADS7841PADS7841PB
CAD (KiCad official)
- Symbol:
ADS7841EB - Footprint:
Package_SO:SSOP-16_5.3x6.2mm_P0.65mm - 3D model: SSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files:
ads7841eb-etched.step/ads7841eb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads7841eb.step/ads7841eb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
0f709a0197a2bfff, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).