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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

ADS7828EB

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16

ADS7828EB from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CH0	input	Analog input channel 0, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
2	CH1	input	Analog input channel 1, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
3	CH2	input	Analog input channel 2, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
4	CH3	input	Analog input channel 3, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
5	CH4	input	Analog input channel 4, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
6	CH5	input	Analog input channel 5, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
7	CH6	input	Analog input channel 6, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
8	CH7	input	Analog input channel 7, full-scale input range 0V to VREF, input capacitance 25pF, leakage current ±1µA.
9	GND	power_in	Analog ground reference for converter and input channels.
10	REFIN/REFOUT	bidirectional	Internal 2.5V reference output (2.475V to 2.525V) or external reference input (minimum 50mV), 110Ω output impedance when internal, 1GΩ input impedance when external.
11	COM	passive	Common analog input reference for multiplexer, typically connected to ground for single-ended measurements or to external reference for differential measurements.
12	A0	input	Slave address bit 0, CMOS logic input with VIH = VDD - 0.7V to VDD + 0.5V, VIL = -0.3V to VDD - 0.3V.
13	A1	input	Slave address bit 1, CMOS logic input with VIH = VDD - 0.7V to VDD + 0.5V, VIL = -0.3V to VDD - 0.3V.
14	SCL	tri_state	I2C serial clock (open-drain), CMOS logic with VIH = VDD - 0.7V to VDD + 0.5V and VIL = -0.3V to VDD - 0.3V, supports standard (100kHz), fast (400kHz), and high-speed (3.4MHz) modes.
15	SDA	tri_state	I2C serial data (open-drain), CMOS logic with VIH = VDD - 0.7V to VDD + 0.5V and VIL = -0.3V to VDD - 0.3V, supports standard (100kHz), fast (400kHz), and high-speed (3.4MHz) modes.
16	+VDD	power_in	Power supply, 2.7V to 5.25V operating range, quiescent current 60µA to 1000µA depending on I2C bus frequency (100kHz to 3.4MHz) and mode.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Data Acquisition
Pins	16

CAD (KiCad official)

Symbol: ADS7828EB
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: ads7828eb-etched.step / ads7828eb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads7828eb.step / ads7828eb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (23 pp, sha256 5d561f2383b6725b, retrieved 2026-09-24, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF