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ADS7822EB

Texas Instruments · Analog To Digital Converters (ADC) · MSOP-8

ADS7822EB from Texas Instruments, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VREF power_in Reference input; the external reference can be any voltage from 50mV to VCC and directly sets the analog input range.
2 +In input Noninverting pseudo-differential analog input that should remain within GND - 200mV to VCC + 200mV to maintain converter linearity.
3 -In input Inverting input, connected to ground or a remote ground sense point, which should not drop below GND - 200mV or exceed GND + 1V.
4 GND power_in Ground pin, which should be placed on a clean ground point kept away from the microprocessor or DSP ground connection.
5 CS/SHDN input Chip select when low and shutdown mode when high; a new conversion starts only when CS is taken high and then returned low.
6 DOUT output Serial output carrying the 12-bit conversion result MSB first, with data valid on the falling edge of DCLOCK and a CMOS swing from 0V to VCC.
7 DCLOCK input Data clock that synchronizes the serial data transfer and determines conversion speed, with an external clock range of 10kHz to 3.2MHz.
8 +VCC power_in Power supply, operating over a range of 2.0V to 5.25V, with specified performance at 2.7V to 3.6V and 4.75V to 5.25V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package MSOP-8
Category Data Acquisition
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage absolute maximum VCC 6 V 2
Analog input voltage -0.3 V 2
Logic input voltage -0.3 6 V 2
Case temperature 100 °C 2
Junction temperature 150 °C 2
Storage temperature 125 °C 2
External reference voltage 5.5 V 2
Absolute input range (-In, GND) -0.2 1 V 3
Absolute input range (+In, GND) -0.2 V 3
Leakage current -1 1 μA 3
Integral linearity error -1 0.5 1 LSB +VCC = +2.7V 3
Integral linearity error -1 1 LSB +VCC = +5V 4
Differential linearity error -1 0.5 1 LSB +VCC = +2.7V 3
Differential linearity error -1 0.5 1 LSB +VCC = +5V 4
Offset error -3 3 LSB +VCC = +2.7V 3
Offset error -3 3 LSB +VCC = +5V 4
Gain error -3 3 LSB +VCC = +2.7V 3
Gain error -3 3 LSB +VCC = +5V 4
Current drain (reference) 8 40 μA +VCC = +2.7V; At code 710h 3
Current drain (reference) 40 100 μA +VCC = +5V; At code 710h 4
Current drain, power-down (reference) 0.001 3 μA +VCC = +2.7V; CS = VCC 3
Current drain, power-down (reference) 0.001 3 μA +VCC = +5V; CS = VCC 4
High-level input voltage VIH 2 5.5 V +VCC = +2.7V; IIH = +5μA 3
Low-level input voltage VIL -0.3 0.8 V +VCC = +2.7V; IIL = +5μA 3
High-level output voltage VOH 2.1 V +VCC = +2.7V; IOH = -250μA 3
Low-level output voltage VOL 0.4 V +VCC = +2.7V; IOL = 250μA 3
High-level input voltage VIH 3 5.5 V +VCC = +5V; IIH = +5μA 4
Low-level input voltage VIL -0.3 0.8 V +VCC = +5V; IIL = +5μA 4
High-level output voltage VOH 3.5 V +VCC = +5V; IOH = -250μA 4
Low-level output voltage VOL 0.4 V +VCC = +5V; IOL = 250μA 4
Specified performance supply voltage VCC 2.7 3.6 V 3
Supply voltage (see notes) VCC 2 2.7 V See Notes (2) and (3) 3
Supply voltage (see note) VCC 2.7 3.6 V See Note (3) 3
Specified performance supply voltage VCC 4.75 5.25 V 4
Quiescent current 200 325 μA +VCC = +2.7V; fSAMPLE = 75kHz 3
Quiescent current 320 550 μA +VCC = +5V; fSAMPLE = 200kHz 4
Power-down current 3 μA +VCC = +2.7V; CS = VCC 3
Power-down current 3 μA +VCC = +5V; CS = VCC 4
Specified performance temperature range -40 85 °C 3
Analog input sample time tSMPL 1.5 2 Clk Cycles VCC = 2.7V 12
CS falling to DCLOCK rising tSUCS 0.03 1000 μs VCC = 2.7V 12
DCLOCK falling to next DOUT valid tdDO 130 200 ns VCC = 2.7V 12
DCLOCK falling to next DOUT valid tdDO 85 150 ns VCC = 5V 12
CS rising to DOUT tri-state tdis 40 80 ns VCC = 2.7V 12
CS rising to DOUT tri-state tdis 25 50 ns VCC = 5V 12
DCLOCK falling to DOUT enabled ten 75 175 ns VCC = 2.7V 12
DCLOCK falling to DOUT enabled ten 50 100 ns VCC = 5V 12
DOUT fall time tf 90 200 ns VCC = 2.7V 12
DOUT fall time tf 70 100 ns VCC = 5V 12
DOUT rise time tr 110 200 ns VCC = 2.7V 12
DOUT rise time tr 60 100 ns VCC = 5V 12

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Plastic ADS7822PC ±0.75 ±0.75 P -40°C to +85°C ADS7822PC ADS7822PC Rails, 50 2

CAD (KiCad official)

  • Symbol: ADS7822EB
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: ads7822eb-2k5-etched.step / ads7822eb-2k5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads7822eb-2k5.step / ads7822eb-2k5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 889c901a1116a5b2, retrieved 2026-11-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF