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ADS7138QRTERQ1

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Texas Instruments Analog To Digital Converters (ADCs), WQFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADS7138QRTERQ1

Texas Instruments · Analog To Digital Converters (ADCs) · WQFN-16(3x3)

ADS7138QRTERQ1 from Texas Instruments, in a WQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN2/GPIO2 bidirectional Channel 2; configurable as either an analog input (default) or a GPIO.
2 AIN3/GPIO3 bidirectional Channel 3; configurable as either an analog input (default) or a GPIO.
3 AIN4/GPIO4 bidirectional Channel 4; configurable as either an analog input (default) or a GPIO.
4 AIN5/GPIO5 bidirectional Channel 5; configurable as either an analog input (default) or a GPIO.
5 AIN6/GPIO6 bidirectional Channel 6; configurable as either an analog input (default) or a GPIO.
6 AIN7/GPIO7 bidirectional Channel 7; configurable as either an analog input (default) or a GPIO.
7 AVDD power_in Analog supply input (2.35 V to 5.5 V), also used as the ADC reference voltage; connect a 1-µF decoupling capacitor to GND.
8 DECAP passive Connect a 1-µF decoupling capacitor between DECAP and GND for the internal power supply.
9 GND power_in Ground for the power supply; all analog and digital signals are referred to this pin voltage.
10 DVDD power_in Digital I/O supply voltage (1.65 V to 5.5 V); connect a 1-µF decoupling capacitor to GND.
11 ADDR input Input for selecting the device I2C address; connect a resistor from DECAP or GND to select one of eight addresses.
12 ALERT output Open-drain (default) or push-pull output for the digital comparator.
13 SCL input Serial clock for the I2C interface.
14 SDA bidirectional Serial data input or output for the I2C interface.
15 AIN0/GPIO0 bidirectional Channel 0; configurable as either an analog input (default) or a general-purpose input/output (GPIO).
16 AIN1/GPIO1 bidirectional Channel 1; configurable as either an analog input (default) or a GPIO.
17 Thermal pad power_in Exposed thermal pad; connect to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16(3x3)
Category ADC/DAC/Data Conversion
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DVDD to GND DVDD -0.3 5.5 V 6
AVDD to GND AVDD -0.3 5.5 V 6
ADDR pin voltage ADDR 2.1 V min is GND, 0.3 6
Digital inputs 5.5 V min is GND, 0.3 6
Current through any pin except supply pins, SCL, and SDA -10 10 mA 6
Junction temperature TJ -40 125 °C 6
Storage temperature Tstg -60 150 °C 6
ESD HBM V(ESD) -2000 2000 V Human-body model, AEC Q100-002 6
ESD CDM corner pins V(ESD) -750 750 V AEC Q100-011; corner pins (1, 4, 5, 8, 9, 12, 13, 16) 6
ESD CDM other pins V(ESD) -500 500 V AEC Q100-011; all other pins 6
Analog supply voltage AVDD 2.35 3.3 5.5 V 6
Digital supply voltage DVDD 1.65 3.3 5.5 V 6
Full-scale input range FSR 0 V AINx, GND; max is AVDD 6
Absolute input voltage VIN -0.1 V AINx, GND; max is AVDD + 0.1 6
Ambient temperature TA -40 25 125 ℃ 6
Junction-to-ambient thermal resistance RθJA 49.7 °C/W RTE (WQFN) 16 pins 7
Junction-to-case (top) thermal resistance RθJC(top) 53.4 °C/W RTE (WQFN) 16 pins 7
Junction-to-board thermal resistance RθJB 24.7 °C/W RTE (WQFN) 16 pins 7
Junction-to-top characterization parameter ΨJT 1.3 °C/W RTE (WQFN) 16 pins 7
Junction-to-board characterization parameter ΨJB 24.7 °C/W RTE (WQFN) 16 pins 7
Junction-to-case (bottom) thermal resistance RθJC(bot) 9.3 °C/W RTE (WQFN) 16 pins 7
Differential nonlinearity DNL -0.75 0.2 0.75 LSB typ printed ±0.2 8
Integral nonlinearity INL -1.5 0.45 1.5 LSB typ printed ±0.45 8
Input offset error V(OS) -2 0.4 2 LSB Post offset calibration; typ printed ±0.4 8
Gain error GE -0.065 0.025 0.065 %FSR typ printed ±0.025 8
Input offset thermal drift 1 ppm/°C Post offset calibration; typ printed ±1 8
Gain error thermal drift 1 ppm/°C typ printed ±1 8
SINAD SINAD 70 72.8 dB AVDD = 5 V, fIN = 2 kHz 8
SINAD SINAD 69.8 72.4 dB AVDD = 3 V, fIN = 2 kHz 8
SNR SNR 71.2 73 dB AVDD = 5 V, fIN = 2 kHz 8
SNR SNR 70.5 72.5 dB AVDD = 3 V, fIN = 2 kHz 8
Total harmonic distortion THD -85 dB fIN = 2 kHz 8
Spurious-free dynamic range SFDR 91 dB fIN = 2 kHz 8
Crosstalk -100 dB 100-kHz signal applied on any OFF channel and measured on ON the channel 8
Sampling capacitance CSH 12 pF 8
Decoupling capacitor on DECAP pin CDECAP 0.1 1 4.7 µF 8
Voltage output on DECAP pin 1.8 V CDECAP = 1 µF 8
SCL/SDA input low logic level VIL -0.3 V All I2C modes; max is 0.3 x DVDD 8
SCL/SDA output low logic level VOL 0 0.4 V Sink current = 2 mA, DVDD > 2 V 8
SCL/SDA low-level output current IOL 3 mA VOL = 0.4 V, standard and fast Mode 8
SCL/SDA low-level output current IOL 6 mA VOL = 0.6 V, fast mode 8
SCL/SDA low-level output current IOL 20 mA VOL = 0.4 V, fast mode plus 8
GPIO input low logic level VIL -0.3 V max is 0.3 x AVDD 8
GPIO input leakage current 10 100 nA GPIO configured as input 8
GPIO output high source current IOH 5 mA VOH > 0.7 x AVDD 8
GPIO output low sink current IOL 5 mA VOL < 0.3 x AVDD 8
ALERT output high source current IOH 5 mA VOH > 0.7 x DVDD 9
ALERT output low sink current IOL 5 mA VOL < 0.3 x DVDD 9
Analog supply current IAVDD 130 210 µA I2C high-speed mode, AVDD = 5 V 9
Analog supply current IAVDD 45 85 µA I2C fast mode plus, AVDD = 5 V 9
Analog supply current IAVDD 25 46 µA I2C fast mode, AVDD = 5 V 9
Analog supply current IAVDD 12 26 µA I2C standard mode, AVDD = 5 V 9
Analog supply current IAVDD 7 20 µA No conversion, AVDD = 5 V 9
Power-up time for device tPU 5 ms AVDD ≥ 2.35 V 10
Delay time; RST bit = 1b to device reset complete tRST 5 ms 10
ALERT high period tALERT_HI 50 150 ns ALERT_LOGIC[1:0] = 1x 10
ALERT low period tALERT_LO 50 150 ns ALERT_LOGIC[1:0] = 1x 10

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper voltage for the ADS7138-Q1. Place the decoupling capacitor for AVDD close to the device AVDD and GND pins and connect the decoupling capacitor to the device pins with thick copper tracks. 80

CAD (KiCad official)

  • Symbol: ADS7138QRTERQ1
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: ads7138qrterq1-etched.step / ads7138qrterq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads7138qrterq1.step / ads7138qrterq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (90 pp, sha256 de71831192632278, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF