main
Ray ads7042: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 85e1af4 27d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "ads7042",
  "title": "ADS7042",
  "brief": "TI 12-bit, 1 MSPS SAR ADC, VSSOP-8. Nano-power, SPI, single-ended, tiny. Datasheet-verified.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "data-converter",
    "adc",
    "sar-adc",
    "12-bit",
    "low-power",
    "vssop-8",
    "texas-instruments"
  ],
  "component": {
    "mpn": "ADS7042",
    "manufacturer": "Texas Instruments",
    "package": "VSSOP-8",
    "pin_count": 8,
    "category": "Data Converter",
    "subcategory": "SAR ADC",
    "datasheet": "https://www.ti.com/lit/ds/symlink/ads7042.pdf",
    "parts": {
      "symbol": "ads7042.kicad_sym",
      "footprint": "ads7042.kicad_mod",
      "model_3d": "ads7042-etched.glb",
      "model_3d_plain": "ads7042.glb",
      "model_3d_step": "ads7042-etched.step",
      "model_3d_step_plain": "ads7042.step",
      "lbr": "ads7042.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital I/O supply voltage. Recommended range 1.65 V to 3.6 V (independent of AVDD); JESD8-7A compliant for a normal DVDD range of 1.65 V to 1.95 V. Bypass locally to GND."
      },
      {
        "number": "2",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input for the SPI-compatible interface. Used to clock out conversion data on SDO and to run the internal conversion; supports SCLK up to 16 MHz."
      },
      {
        "number": "3",
        "name": "SDO",
        "type": "output",
        "description": "Serial data output. Shifts out the 12-bit conversion result MSB-first on SCLK edges while CS is asserted low. Referenced to DVDD."
      },
      {
        "number": "4",
        "name": "CS",
        "type": "input",
        "description": "Active-low chip-select. The falling edge of CS samples the analog input, initiates conversion, and frames the SPI read of the conversion result."
      },
      {
        "number": "5",
        "name": "AINM",
        "type": "input",
        "description": "Negative analog input of the single-ended SAR ADC. Tie to the analog ground reference; allowable range -0.3 V to +0.3 V relative to GND."
      },
      {
        "number": "6",
        "name": "AINP",
        "type": "input",
        "description": "Positive analog input of the single-ended SAR ADC. Unipolar input range 0 V to AVDD; allowable range -0.3 V to AVDD+0.3 V."
      },
      {
        "number": "7",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog power-supply input; also serves as the ADC reference voltage. Recommended range 1.65 V to 3.6 V. Requires a low-impedance bypass to GND for reference stability."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground return for the analog and digital supplies. All analog and digital signals are referenced to this pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/ads7042.pdf",
        "pages": 46,
        "sha256": "96d5f335d91126fd",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ads7042.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.1,
          2.0,
          0.85
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "353552981eef35cb93635057d4aeb89aef22648c77af6fd095e328bfe6b834bd",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ads7042-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.1,
          2.0,
          0.85
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "61360e0df7777c809b704ff156fddc9d535a3b0f029f25818d6e58b9938e0cc1",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "12-bit SAR ADC",
      "Throughput": "1 MSPS",
      "Input": "Single-ended (AINP/AINM)",
      "Interface": "SPI",
      "Reference": "AVDD (supply)",
      "Power": "~1 uW at 1 kSPS",
      "Supply": "1.65-3.6 V",
      "Package": "VSSOP-8"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ads7042",
    "12-bit sar adc",
    "low power adc",
    "1msps adc spi"
  ],
  "discovery_pitch": "TI ADS7042 12-bit 1 MSPS SAR ADC (VSSOP-8) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ads7042.kicad_sym",
    "ads7042.kicad_mod",
    "ads7042.glb",
    "ads7042.step",
    "ads7042.lbr",
    "docs/hero.png",
    "docs/ads7042-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ads7042-etched.step"
  ]
}