component
ADS62C15IRGCR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+101@@ -0,0 +1,101 @@+# ADS62C15IRGCR++**Texas Instruments** · Analog To Digital Converters (ADC) · QFN-64-EP(9x9)++ADS62C15IRGCR from Texas Instruments, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DRVDD | power_in | Digital supply, 1.65 V to 3.6 V in CMOS mode (3.0 V to 3.6 V in LVDS mode). |+| 2 | DB1 | output | Channel B CMOS data output bit 1. |+| 3 | DB2 | output | Channel B CMOS data output bit 2. |+| 4 | DB3 | output | Channel B CMOS data output bit 3. |+| 5 | DB4 | output | Channel B CMOS data output bit 4. |+| 6 | DB5 | output | Channel B CMOS data output bit 5. |+| 7 | DB6 | output | Channel B CMOS data output bit 6. |+| 8 | DB7 | output | Channel B CMOS data output bit 7. |+| 9 | DB8 | output | Channel B CMOS data output bit 8. |+| 10 | DB9 | output | Channel B CMOS data output bit 9. |+| 11 | DB10 | output | Channel B CMOS data output bit 10 (MSB). |+| 12 | RESET | input | Serial interface reset input, tied permanently high in parallel interface mode, with internal 100 kΩ pull-down. |+| 13 | SCLK | input | Serial interface clock input when RESET is low, or analog control pin for coarse gain and internal/external reference when RESET is high, with internal pull-down. |+| 14 | SDATA | input | Serial interface data input when RESET is low, with internal pull-down resistor to ground. |+| 15 | SEN | input | Serial interface enable input when RESET is low, or analog control pin for LVDS/CMOS interface and data format when RESET is high, with internal pull-up to AVDD. |+| 16 | AVDD | power_in | Analog power supply, 3 V to 3.6 V. |+| 17 | AGND | power_in | Analog ground. |+| 18 | AGND | power_in | Analog ground. |+| 19 | INM_B | input | Channel B differential analog input (negative); must be tied to VCM and not floated when unused. |+| 20 | INP_B | input | Channel B differential analog input (positive); must be tied to VCM and not floated when unused. |+| 21 | AGND | power_in | Analog ground. |+| 22 | AGND | power_in | Analog ground. |+| 23 | VCM | bidirectional | Common-mode voltage output in internal reference mode; reference input in external reference mode that sets the ADC internal references. |+| 24 | AGND | power_in | Analog ground. |+| 25 | CLKP | input | Differential input clock (positive). |+| 26 | CLKM | input | Differential input clock (negative). |+| 27 | AGND | power_in | Analog ground. |+| 28 | AGND | power_in | Analog ground. |+| 29 | INM_A | input | Channel A differential analog input (negative); must be tied to VCM and not floated when unused. |+| 30 | INP_A | input | Channel A differential analog input (positive); must be tied to VCM and not floated when unused. |+| 31 | AGND | power_in | Analog ground. |+| 32 | AGND | power_in | Analog ground. |+| 33 | AVDD | power_in | Analog power supply, 3 V to 3.6 V. |+| 34 | AVDD | power_in | Analog power supply, 3 V to 3.6 V. |+| 35 | CTRL1 | input | Digital logic control input that together with CTRL2 and CTRL3 sets power-down and multiplexed modes (Table 6). |+| 36 | CTRL2 | input | Digital logic control input that together with CTRL1 and CTRL3 sets power-down and multiplexed modes (Table 6). |+| 37 | CTRL3 | input | Digital logic control input that together with CTRL1 and CTRL2 sets power-down and multiplexed modes (Table 6). |+| 38 | DRVDD | power_in | Digital supply, 1.65 V to 3.6 V in CMOS mode. |+| 39 | DRGND | power_in | Digital ground. |+| 40 | NC | unconnected | Do not connect. |+| 41 | NC | unconnected | Do not connect. |+| 42 | NC | unconnected | Do not connect. |+| 43 | DA0 | output | Channel A CMOS data output bit 0 (LSB). |+| 44 | DA1 | output | Channel A CMOS data output bit 1. |+| 45 | DA2 | output | Channel A CMOS data output bit 2. |+| 46 | DA3 | output | Channel A CMOS data output bit 3. |+| 47 | DA4 | output | Channel A CMOS data output bit 4. |+| 48 | DRVDD | power_in | Digital supply, 1.65 V to 3.6 V in CMOS mode. |+| 49 | DRGND | power_in | Digital ground. |+| 50 | DA5 | output | Channel A CMOS data output bit 5. |+| 51 | DA6 | output | Channel A CMOS data output bit 6. |+| 52 | DA7 | output | Channel A CMOS data output bit 7. |+| 53 | DA8 | output | Channel A CMOS data output bit 8. |+| 54 | DA9 | output | Channel A CMOS data output bit 9. |+| 55 | DA10 | output | Channel A CMOS data output bit 10 (MSB). |+| 56 | SDOUT | output | Serial data readout pin only when SERIAL READBACK = 1, otherwise forced low or high (not high-impedance); leave floated if unused. |+| 57 | CLKOUT | output | CMOS output clock. |+| 58 | DRVDD | power_in | Digital supply, 1.65 V to 3.6 V in CMOS mode. |+| 59 | DRGND | power_in | Digital ground. |+| 60 | NC | unconnected | Do not connect. |+| 61 | NC | unconnected | Do not connect. |+| 62 | NC | unconnected | Do not connect. |+| 63 | DB0 | output | Channel B CMOS data output bit 0 (LSB). |+| 64 | DRGND | power_in | Digital ground. |+| 65 | PAD | power_in | Exposed pad connected to digital ground; solder to digital ground using multiple vias for electrical and thermal performance. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | QFN-64-EP(9x9) |+| Category | Data Acquisition |+| Pins | 65 |++## CAD (KiCad official)++- Symbol: `ADS62C15IRGCR`+- Footprint: `Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm`+- 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)+- 3D model files: `ads62c15irgcr-etched.step` / `ads62c15irgcr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads62c15irgcr.step` / `ads62c15irgcr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads62c15) (65 pp, sha256 `495e73268a438755`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads62c15irgcr-datasheet.pdf)
page.jsonadded+545@@ -0,0 +1,545 @@+{+ "slug": "ads62c15irgcr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Analog To Digital Converters (ADC), QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "ads62c15irgcr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ads62c15irgcr.kicad_sym",+ "ads62c15irgcr.kicad_mod",+ "ads62c15irgcr.glb",+ "ads62c15irgcr.step",+ "ads62c15irgcr.lbr",+ "docs/hero.png",+ "docs/ads62c15irgcr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ads62c15irgcr-hero.glb",+ "ads62c15irgcr-hero.overlay.json"+ ],+ "component": {+ "mpn": "ADS62C15IRGCR",+ "manufacturer": "Texas Instruments",+ "package": "QFN-64-EP(9x9)",+ "pin_count": 65,+ "category": "Data Acquisition",+ "subcategory": "Analog To Digital Converters (ADC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ads62c15",+ "parts": {+ "symbol": "ads62c15irgcr.kicad_sym",+ "footprint": "ads62c15irgcr.kicad_mod",+ "model_3d": "ads62c15irgcr-hero.glb",+ "model_3d_plain": "ads62c15irgcr.glb",+ "model_3d_step": "ads62c15irgcr-etched.step",+ "model_3d_step_plain": "ads62c15irgcr.step",+ "lbr": "ads62c15irgcr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2670837",+ "digikey": "ADS62C15IRGCR-ND",+ "mouser": "595-ADS62C15IRGCR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T02:14:46Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "ADS62C15IRGCR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-ADS62C15IRGCR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "DRVDD",+ "type": "power_in",+ "description": "Digital supply, 1.65 V to 3.6 V in CMOS mode (3.0 V to 3.6 V in LVDS mode)."+ },+ {+ "number": "2",+ "name": "DB1",+ "type": "output",+ "description": "Channel B CMOS data output bit 1."+ },+ {+ "number": "3",+ "name": "DB2",+ "type": "output",+ "description": "Channel B CMOS data output bit 2."+ },+ {+ "number": "4",+ "name": "DB3",+ "type": "output",+ "description": "Channel B CMOS data output bit 3."+ },+ {+ "number": "5",+ "name": "DB4",+ "type": "output",+ "description": "Channel B CMOS data output bit 4."+ },+ {+ "number": "6",+ "name": "DB5",+ "type": "output",+ "description": "Channel B CMOS data output bit 5."+ },+ {+ "number": "7",+ "name": "DB6",+ "type": "output",+ "description": "Channel B CMOS data output bit 6."+ },+ {+ "number": "8",+ "name": "DB7",+ "type": "output",+ "description": "Channel B CMOS data output bit 7."+ },+ {+ "number": "9",+ "name": "DB8",+ "type": "output",+ "description": "Channel B CMOS data output bit 8."+ },+ {+ "number": "10",+ "name": "DB9",+ "type": "output",+ "description": "Channel B CMOS data output bit 9."+ },+ {+ "number": "11",+ "name": "DB10",+ "type": "output",+ "description": "Channel B CMOS data output bit 10 (MSB)."+ },+ {+ "number": "12",+ "name": "RESET",+ "type": "input",+ "description": "Serial interface reset input, tied permanently high in parallel interface mode, with internal 100 kΩ pull-down."+ },+ {+ "number": "13",+ "name": "SCLK",+ "type": "input",+ "description": "Serial interface clock input when RESET is low, or analog control pin for coarse gain and internal/external reference when RESET is high, with internal pull-down."+ },+ {+ "number": "14",+ "name": "SDATA",+ "type": "input",+ "description": "Serial interface data input when RESET is low, with internal pull-down resistor to ground."+ },+ {+ "number": "15",+ "name": "SEN",+ "type": "input",+ "description": "Serial interface enable input when RESET is low, or analog control pin for LVDS/CMOS interface and data format when RESET is high, with internal pull-up to AVDD."+ },+ {+ "number": "16",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply, 3 V to 3.6 V."+ },+ {+ "number": "17",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "18",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "19",+ "name": "INM_B",+ "type": "input",+ "description": "Channel B differential analog input (negative); must be tied to VCM and not floated when unused."+ },+ {+ "number": "20",+ "name": "INP_B",+ "type": "input",+ "description": "Channel B differential analog input (positive); must be tied to VCM and not floated when unused."+ },+ {+ "number": "21",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "22",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "23",+ "name": "VCM",+ "type": "bidirectional",+ "description": "Common-mode voltage output in internal reference mode; reference input in external reference mode that sets the ADC internal references."+ },+ {+ "number": "24",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "25",+ "name": "CLKP",+ "type": "input",+ "description": "Differential input clock (positive)."+ },+ {+ "number": "26",+ "name": "CLKM",+ "type": "input",+ "description": "Differential input clock (negative)."+ },+ {+ "number": "27",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "28",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "29",+ "name": "INM_A",+ "type": "input",+ "description": "Channel A differential analog input (negative); must be tied to VCM and not floated when unused."+ },+ {+ "number": "30",+ "name": "INP_A",+ "type": "input",+ "description": "Channel A differential analog input (positive); must be tied to VCM and not floated when unused."+ },+ {+ "number": "31",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "32",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "33",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply, 3 V to 3.6 V."+ },+ {+ "number": "34",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply, 3 V to 3.6 V."+ },+ {+ "number": "35",+ "name": "CTRL1",+ "type": "input",+ "description": "Digital logic control input that together with CTRL2 and CTRL3 sets power-down and multiplexed modes (Table 6)."+ },+ {+ "number": "36",+ "name": "CTRL2",+ "type": "input",+ "description": "Digital logic control input that together with CTRL1 and CTRL3 sets power-down and multiplexed modes (Table 6)."+ },+ {+ "number": "37",+ "name": "CTRL3",+ "type": "input",+ "description": "Digital logic control input that together with CTRL1 and CTRL2 sets power-down and multiplexed modes (Table 6)."+ },+ {+ "number": "38",+ "name": "DRVDD",+ "type": "power_in",+ "description": "Digital supply, 1.65 V to 3.6 V in CMOS mode."+ },+ {+ "number": "39",+ "name": "DRGND",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "40",+ "name": "NC",+ "type": "unconnected",+ "description": "Do not connect."+ },+ {+ "number": "41",+ "name": "NC",+ "type": "unconnected",+ "description": "Do not connect."+ },+ {+ "number": "42",+ "name": "NC",+ "type": "unconnected",+ "description": "Do not connect."+ },+ {+ "number": "43",+ "name": "DA0",+ "type": "output",+ "description": "Channel A CMOS data output bit 0 (LSB)."+ },+ {+ "number": "44",+ "name": "DA1",+ "type": "output",+ "description": "Channel A CMOS data output bit 1."+ },+ {+ "number": "45",+ "name": "DA2",+ "type": "output",+ "description": "Channel A CMOS data output bit 2."+ },+ {+ "number": "46",+ "name": "DA3",+ "type": "output",+ "description": "Channel A CMOS data output bit 3."+ },+ {+ "number": "47",+ "name": "DA4",+ "type": "output",+ "description": "Channel A CMOS data output bit 4."+ },+ {+ "number": "48",+ "name": "DRVDD",+ "type": "power_in",+ "description": "Digital supply, 1.65 V to 3.6 V in CMOS mode."+ },+ {+ "number": "49",+ "name": "DRGND",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "50",+ "name": "DA5",+ "type": "output",+ "description": "Channel A CMOS data output bit 5."+ },+ {+ "number": "51",+ "name": "DA6",+ "type": "output",+ "description": "Channel A CMOS data output bit 6."+ },+ {+ "number": "52",+ "name": "DA7",+ "type": "output",+ "description": "Channel A CMOS data output bit 7."+ },+ {+ "number": "53",+ "name": "DA8",+ "type": "output",+ "description": "Channel A CMOS data output bit 8."+ },+ {+ "number": "54",+ "name": "DA9",+ "type": "output",+ "description": "Channel A CMOS data output bit 9."+ },+ {+ "number": "55",+ "name": "DA10",+ "type": "output",+ "description": "Channel A CMOS data output bit 10 (MSB)."+ },+ {+ "number": "56",+ "name": "SDOUT",+ "type": "output",+ "description": "Serial data readout pin only when SERIAL READBACK = 1, otherwise forced low or high (not high-impedance); leave floated if unused."+ },+ {+ "number": "57",+ "name": "CLKOUT",+ "type": "output",+ "description": "CMOS output clock."+ },+ {+ "number": "58",+ "name": "DRVDD",+ "type": "power_in",+ "description": "Digital supply, 1.65 V to 3.6 V in CMOS mode."+ },+ {+ "number": "59",+ "name": "DRGND",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "60",+ "name": "NC",+ "type": "unconnected",+ "description": "Do not connect."+ },+ {+ "number": "61",+ "name": "NC",+ "type": "unconnected",+ "description": "Do not connect."+ },+ {+ "number": "62",+ "name": "NC",+ "type": "unconnected",+ "description": "Do not connect."+ },+ {+ "number": "63",+ "name": "DB0",+ "type": "output",+ "description": "Channel B CMOS data output bit 0 (LSB)."+ },+ {+ "number": "64",+ "name": "DRGND",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "65",+ "name": "PAD",+ "type": "power_in",+ "description": "Exposed pad connected to digital ground; solder to digital ground using multiple vias for electrical and thermal performance."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Device supports both CMOS and LVDS output interface modes; pinout provided documents CMOS interface.; Device is fully configurable through SCLK and SEN analog control pins (when RESET high) or through s",+ "exposed pad 65 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint",+ "4/65 pins cited to the wrong page (name found elsewhere): ['19:INB_M@p26', '20:INB_P@p26', '29:INA_P@p26', '30:INA_M@p26']"+ ],+ "pages_sent": 18,+ "cost_usd": 0.2637,+ "at": "2026-10-07T02:14:26"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ads62c15",+ "pages": 65,+ "sha256": "495e73268a438755",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 65,+ "described": 65,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ads62c15irgcr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 0.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ads62c15irgcr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 0.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f4e74229f4000ec1f20e51c52234e19b984649b256eabbaed07cbe959818fb19",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}