# ADS6124IRHBR

**Texas Instruments** · Analog To Digital Converters (ADCs) · QFN-32-EP(5x5)

ADS6124IRHBR from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DRVDD | power_in | Digital output buffer supply, 1.65 V to 3.6 V for the CMOS interface and 3 V to 3.6 V for the LVDS interface per the recommended operating conditions. |
| 2 | RESET | input | Serial interface reset input; a high-going pulse initializes the internal registers, the pin must be tied HIGH in parallel interface mode, and it has an internal 100-kΩ pull-down. |
| 3 | SCLK | input | Serial interface clock when RESET is low; when RESET is high it selects 0 dB gain (low) or 3.5 dB gain (high) with internal reference, and it has an internal 100-kΩ pull-down. |
| 4 | SDATA | input | Serial interface data input when RESET is low; when RESET is high it controls power-down modes together with PDN, and it has an internal 100-kΩ pull-down. |
| 5 | SEN | input | Serial interface enable when RESET is low; when RESET is high it controls output interface type and data format, and it has an internal 100-kΩ pull-up to DRVDD. |
| 6 | AGND | power_in | Analog ground. |
| 7 | CLKP | input | Differential clock input, true; ac-coupled sine clock amplitude 0.4 to 1.5 Vpp, also supports LVPECL, LVDS and LVCMOS clocks. |
| 8 | CLKM | input | Differential clock input, complement; ac-coupled sine clock amplitude 0.4 to 1.5 Vpp, also supports LVPECL, LVDS and LVCMOS clocks. |
| 9 | AGND | power_in | Analog ground. |
| 10 | INP | input | Differential analog input, true; differential input range 2 Vpp with input common-mode voltage 1.5 V ±0.1 V. |
| 11 | INM | input | Differential analog input, complement; differential input range 2 Vpp with input common-mode voltage 1.5 V ±0.1 V. |
| 12 | AGND | power_in | Analog ground. |
| 13 | AVDD | power_in | Analog power supply, 3 V to 3.6 V (3.3 V nominal). |
| 14 | VCM | bidirectional | Common-mode voltage output in internal reference mode; reference input in external reference mode, where 1.45 V to 1.55 V is applied to set the internal references. |
| 15 | AVDD | power_in | Analog power supply, 3 V to 3.6 V (3.3 V nominal). |
| 16 | PDN | input | Global power-down control pin. |
| 17 | NC | unconnected | Do not connect. |
| 18 | NC | unconnected | Do not connect. |
| 19 | D0 | output | CMOS output data bit D0. |
| 20 | D1 | output | CMOS output data bit D1. |
| 21 | D2 | output | CMOS output data bit D2. |
| 22 | D3 | output | CMOS output data bit D3. |
| 23 | D4 | output | CMOS output data bit D4. |
| 24 | D5 | output | CMOS output data bit D5. |
| 25 | OVR | output | CMOS-level over-range indicator, asserted when the differential analog input exceeds full scale. |
| 26 | CLKOUT | output | CMOS output clock. |
| 27 | D6 | output | CMOS output data bit D6. |
| 28 | D7 | output | CMOS output data bit D7. |
| 29 | D8 | output | CMOS output data bit D8. |
| 30 | D9 | output | CMOS output data bit D9. |
| 31 | D10 | output | CMOS output data bit D10. |
| 32 | D11 | output | CMOS output data bit D11 (MSB in CMOS mode). |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-32-EP(5x5) |
| Category | ADC/DAC/Data Conversion |
| Pins | 33 |

## CAD (KiCad official)

- Symbol: `ADS6124IRHBR`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `ads6124irhbr-etched.step` / `ads6124irhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads6124irhbr.step` / `ads6124irhbr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads6124) (68 pp, sha256 `9c6ec6d5b4b7b5c3`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ads6124irhbr-datasheet.pdf)