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ADS5231IPAGT

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Texas Instruments Analog To Digital Converters (ADC), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ADS5231IPAGT

Texas Instruments · Analog To Digital Converters (ADC) · TQFP-64(10x10)

ADS5231IPAGT from Texas Instruments, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SEL input Serial interface select: 0 configures pins 41, 42, 45 as MSBI, OEA, STPD, 1 enables the serial interface (SEN, SCLK, SDATA), and a low-going pulse on SEL at power-up resets the serial registers.
2 AGND power_in Analog ground.
3 AVDD power_in Analog supply, 3.0V to 3.6V recommended (3.3V typ).
4 GND power_in Output buffer ground.
5 VDRV power_in Output buffer supply, 3.0V to 3.6V recommended (3.3V typ).
6 OEB input Output enable for channel B: 0 = enabled (default), 1 = tri-state.
7 GND power_in Output buffer ground.
8 VDRV power_in Output buffer supply, 3.0V to 3.6V recommended (3.3V typ).
9 OVRB output Over-range indicator for channel B.
10 D0_B output Channel B data output bit D0 (LSB).
11 D1_B output Channel B data output bit D1.
12 D2_B output Channel B data output bit D2.
13 D3_B output Channel B data output bit D3.
14 D4_B output Channel B data output bit D4.
15 D5_B output Channel B data output bit D5.
16 D6_B output Channel B data output bit D6.
17 D7_B output Channel B data output bit D7.
18 D8_B output Channel B data output bit D8.
19 D9_B output Channel B data output bit D9.
20 D10_B output Channel B data output bit D10.
21 D11_B output Channel B data output bit D11 (MSB).
22 DVB output Data valid output, channel B.
23 GND power_in Output buffer ground.
24 CLK input Clock input; low-level voltage max 0.6V, high-level voltage min 2.2V.
25 GND power_in Output buffer ground.
26 DVA output Data valid output, channel A.
27 D0_A output Channel A data output bit D0 (LSB).
28 D1_A output Channel A data output bit D1.
29 D2_A output Channel A data output bit D2.
30 D3_A output Channel A data output bit D3.
31 D4_A output Channel A data output bit D4.
32 D5_A output Channel A data output bit D5.
33 D6_A output Channel A data output bit D6.
34 D7_A output Channel A data output bit D7.
35 D8_A output Channel A data output bit D8.
36 D9_A output Channel A data output bit D9.
37 D10_A output Channel A data output bit D10.
38 D11_A output Channel A data output bit D11 (MSB).
39 OVRA output Over-range indicator for channel A.
40 VDRV power_in Output buffer supply, 3.0V to 3.6V recommended (3.3V typ).
41 MSBI/SEN input When SEL = 0, MSBI: 1 = binary two's complement, 0 = straight offset binary (default); when SEL = 1, serial write enable (SEN).
42 OEA/SCLK input When SEL = 0, OEA: 0 = enabled (default), 1 = tri-state for channel A; when SEL = 1, serial write clock (SCLK).
43 VDRV power_in Output buffer supply, 3.0V to 3.6V recommended (3.3V typ).
44 GND power_in Output buffer ground.
45 STPD/SDATA input When SEL = 0, STPD power-down: 0 = normal operation (default), 1 = enabled; when SEL = 1, serial write data (SDATA).
46 AVDD power_in Analog supply, 3.0V to 3.6V recommended (3.3V typ).
47 AGND power_in Analog ground.
48 AGND power_in Analog ground.
49 AGND power_in Analog ground.
50 INA+ input Analog input, channel A.
51 INA- input Complementary analog input, channel A.
52 CM output Common-mode voltage output.
53 REFT bidirectional Top reference/bypass pin, use a 2Ω resistor in series with a 0.1µF capacitor to ground.
54 REFB bidirectional Bottom reference/bypass pin, use a 2Ω resistor in series with a 0.1µF capacitor to ground.
55 AGND power_in Analog ground.
56 INT/EXT input Reference select: 0 = external (default), 1 = internal; force high for internal reference operation.
57 AVDD power_in Analog supply, 3.0V to 3.6V recommended (3.3V typ).
58 AGND power_in Analog ground.
59 AGND power_in Analog ground.
60 ISET passive Bias current setting resistor of 56.2kΩ to ground.
61 AGND power_in Analog ground.
62 INB- input Complementary analog input, channel B.
63 INB+ input Analog input, channel B.
64 AGND power_in Analog ground.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-64(10x10)
Category Data Acquisition
Pins 64

CAD (KiCad official)

  • Symbol: ADS5231IPAGT
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: ads5231ipagt-etched.step / ads5231ipagt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads5231ipagt.step / ads5231ipagt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 9e8605025b6d3662, retrieved 2026-09-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF