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ADS4128IRGZR

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Texas Instruments Analog To Digital Converters (ADCs), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionads4128irgzrfactory-2.0.0extractor-text

Verified ADS4128IRGZR

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 49 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADS4128IRGZR · VQFN-48-EP(7x7) · 49 pins
  • ✓copper: 49 copper pads, none touching another net
  • ✓datasheet: all 49 pin names found in the 58-page datasheet
  • ✓distributor: lcsc C2670933, digikey ADS4128IRGZR-ND, mouser 595-ADS4128IRGZR
  • ✓family: QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-i249zrl1/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.55)
  • ✓pads: 49 pins = 49 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 49 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ads4128irgzr.kicad_sym✓ ads4128irgzr.kicad_mod✓ ads4128irgzr.step
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Ray Publish 0.1.0 3ab7aa4 3d ago

ADS4128IRGZR

Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-48-EP(7x7)

ADS4128IRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DRGND power_in Digital and output buffer ground.
2 DRVDD power_in 1.8-V digital and output buffer supply.
3 OVR_SDOUT output Out-of-range indicator after reset when READOUT = 0, serial register readout pin when READOUT = 1.
4 CLKOUTM output Differential output clock, negative (LVDS mode; unused pin in CMOS mode).
5 CLKOUTP output Differential output clock, positive (LVDS mode; CMOS output clock CLKOUT in CMOS mode).
6 DFS input Data format select input that sets the data format (twos complement or offset binary) and the LVDS or CMOS output interface type.
7 OE input Output buffer enable input, active high, with internal 180-kΩ pull-up resistor to DRVDD.
8 AVDD power_in 1.8-V analog power supply.
9 AGND power_in Analog ground.
10 CLKP input Differential clock input, positive.
11 CLKM input Differential clock input, negative.
12 AGND power_in Analog ground.
13 VCM output Outputs the common-mode voltage (0.95 V) that can be used externally to bias the analog input pins.
14 AGND power_in Analog ground.
15 INP input Differential analog input, positive.
16 INM input Differential analog input, negative.
17 AGND power_in Analog ground.
18 AVDD power_in 1.8-V analog power supply.
19 AGND power_in Analog ground.
20 AVDD power_in 1.8-V analog power supply.
21 NC unconnected Do not connect.
22 AVDD power_in 1.8-V analog power supply.
23 RESERVED input Digital control pin, reserved for future use.
24 AVDD power_in 1.8-V analog power supply.
25 AGND power_in Analog ground.
26 AVDD power_in 1.8-V analog power supply.
27 SEN input Serial interface enable input when RESET is low; when RESET is high it has no function and should be tied to AVDD; internal 180-kΩ pull-up resistor to AVDD.
28 SDATA input Serial interface data input when RESET is low, STANDBY control pin when RESET is high; internal 180-kΩ pull-down resistor.
29 SCLK input Serial interface clock input when RESET is low; when RESET is high it has no function and should be tied to ground; internal 180-kΩ pull-down resistor.
30 RESET input Serial interface reset input; when tied high the internal registers are reset to defaults; internal 180-kΩ pull-down resistor.
31 NC unconnected Do not connect.
32 NC unconnected Do not connect.
33 NC unconnected Do not connect.
34 NC unconnected Do not connect.
35 DRVDD power_in 1.8-V digital and output buffer supply.
36 DRGND power_in Digital and output buffer ground.
37 D0_D1_M output Differential output data D0 and D1 multiplexed, complement (CMOS mode: D0 output).
38 D0_D1_P output Differential output data D0 and D1 multiplexed, true (CMOS mode: D1 output).
39 D2_D3_M output Differential output data D2 and D3 multiplexed, complement (CMOS mode: D2 output).
40 D2_D3_P output Differential output data D2 and D3 multiplexed, true (CMOS mode: D3 output).
41 D4_D5_M output Differential output data D4 and D5 multiplexed, complement (CMOS mode: D4 output).
42 D4_D5_P output Differential output data D4 and D5 multiplexed, true (CMOS mode: D5 output).
43 D6_D7_M output Differential output data D6 and D7 multiplexed, complement (CMOS mode: D6 output).
44 D6_D7_P output Differential output data D6 and D7 multiplexed, true (CMOS mode: D7 output).
45 D8_D9_M output Differential output data D8 and D9 multiplexed, complement (CMOS mode: D8 output).
46 D8_D9_P output Differential output data D8 and D9 multiplexed, true (CMOS mode: D9 output).
47 D10_D11_M output Differential output data D10 and D11 multiplexed, complement (CMOS mode: D10 output).
48 D10_D11_P output Differential output data D10 and D11 multiplexed, true (CMOS mode: D11 output).
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48-EP(7x7)
Category ADC/DAC/Data Conversion
Pins 49

CAD (KiCad official)

  • Symbol: ADS4128IRGZR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: ads4128irgzr-etched.step / ads4128irgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads4128irgzr.step / ads4128irgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (58 pp, sha256 722a061e94269921, retrieved 2026-10-31, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF