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ADS131M08IRSNR

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Texas Instruments Analog To Digital Converters (ADC), QFN-32(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ads131m08irsnr-etched.glb ads131m08irsnr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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ADS131M08IRSNR

Texas Instruments · Analog To Digital Converters (ADC) · QFN-32(4x4)

ADS131M08IRSNR from Texas Instruments, in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN2P input Positive differential analog input 2; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
2 AIN2N input Negative differential analog input 2; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
3 AIN3N input Negative differential analog input 3; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
4 AIN3P input Positive differential analog input 3; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
5 AIN4P input Positive differential analog input 4; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
6 AIN4N input Negative differential analog input 4; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
7 AIN5N input Negative differential analog input 5; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
8 AIN5P input Positive differential analog input 5; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
9 AIN6P input Positive differential analog input 6; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
10 AIN6N input Negative differential analog input 6; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
11 AIN7N input Negative differential analog input 7; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
12 AIN7P input Positive differential analog input 7; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
13 AGND power_in Analog ground supply; connect to system ground plane.
14 REFIN input External reference voltage input; accepts 1.1V to 1.3V; do not place capacitance on REFIN if current-detect mode is used.
15 AVDD power_in Analog power supply 2.7V to 3.6V in normal operating mode; connect 1-µF capacitor to AGND.
16 SYNC/RESET input Conversion synchronization or system reset input; active low; controls ADC conversion timing and device reset.
17 CS input Serial interface chip select input; active low; initiates SPI communication frame.
18 DRDY output Data ready output; active low pulse indicates new ADC conversion data available for readout.
19 SCLK input Serial clock input for SPI communication; clocks data in and out of the ADC.
20 DOUT output Serial data output from SPI interface; transmits ADC conversion data and status information.
21 DIN input Serial data input for SPI communication; receives register addresses and command/data words.
22 XTAL2 output Crystal oscillator excitation output or external clock input for crystal or external clock source.
23 XTAL1/CLKIN input Master clock input or crystal oscillator input; frequency 0.3MHz to 8.4MHz for high-resolution mode.
24 CAP output Digital LDO regulator output; connect 220-nF bypass capacitor to DGND.
25 DGND power_in Digital ground supply; connect to system ground plane.
26 DVDD power_in Digital power supply 2.7V to 3.6V; connect 1-µF capacitor to DGND.
27 NC unconnected No connection; leave unconnected or connect to AGND.
28 AGND power_in Analog ground supply; connect to system ground plane.
29 AIN0P input Positive differential analog input 0; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
30 AIN0N input Negative differential analog input 0; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
31 AIN1N input Negative differential analog input 1; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
32 AIN1P input Positive differential analog input 1; input voltage range AGND - 1.3V to AVDD when gain is 1-4, or AGND - 1.3V to AVDD - 1.8V when gain is 8-128.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-32(4x4)
Category Data Acquisition
Pins 33

CAD (KiCad official)

  • Symbol: ADS131M08IRSNR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32(4x4) (KiCad packages3D, STEP)
  • 3D model files: ads131m08irsnr-etched.step / ads131m08irsnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads131m08irsnr.step / ads131m08irsnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (119 pp, sha256 b5b15a08a7950103, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF