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ADS131M06IRSNR

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Texas Instruments Analog To Digital Converters (ADC), QFN-32(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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ADS131M06IRSNR

Texas Instruments · Analog To Digital Converters (ADC) · QFN-32(4x4)

ADS131M06IRSNR from Texas Instruments, in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN2P input Positive input for channel 2 differential ADC conversion.
2 AIN2N input Negative input for channel 2 differential ADC conversion.
3 AIN3N input Negative input for channel 3 differential ADC conversion.
4 AIN3P input Positive input for channel 3 differential ADC conversion.
5 AIN4P input Positive input for channel 4 differential ADC conversion.
6 AIN4N input Negative input for channel 4 differential ADC conversion.
7 AIN5N input Negative input for channel 5 differential ADC conversion.
8 AIN5P input Positive input for channel 5 differential ADC conversion.
9 NC unconnected No connection.
10 NC unconnected No connection.
11 NC unconnected No connection.
12 NC unconnected No connection.
13 AGND power_in Analog ground return.
14 REFIN input External reference input accepting 1.1 V to 1.3 V.
15 AVDD power_in Analog supply requiring 2.7 V to 3.6 V with 1-µF bypass capacitor to AGND.
16 SYNC/RESET input Active-low input for conversion synchronization or system reset.
17 CS input Active-low chip select for SPI interface.
18 DRDY output Active-low data ready output.
19 SCLK input Serial clock input for SPI communication.
20 DOUT output Serial data output for SPI communication.
21 DIN input Serial data input for SPI communication.
22 XTAL2 output Crystal oscillator excitation output.
23 XTAL1/CLKIN input Master clock input supporting 0.3 MHz to 8.4 MHz frequency range.
24 CAP output LDO regulator output at 1.8 V with 220-nF bypass capacitor required to DGND.
25 DGND power_in Digital ground return.
26 DVDD power_in Digital supply requiring 1.8 V to 3.6 V with 1-µF bypass capacitor to DGND.
27 NC unconnected No connection; optional connection to AGND allowed.
28 AGND power_in Analog ground return.
29 AIN0P input Positive input for channel 0 differential ADC conversion.
30 AIN0N input Negative input for channel 0 differential ADC conversion.
31 AIN1N input Negative input for channel 1 differential ADC conversion.
32 AIN1P input Positive input for channel 1 differential ADC conversion.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-32(4x4)
Category Data Acquisition
Pins 33

CAD (KiCad official)

  • Symbol: ADS131M06IRSNR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32(4x4) (KiCad packages3D, STEP)
  • 3D model files: ads131m06irsnr-etched.step / ads131m06irsnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads131m06irsnr.step / ads131m06irsnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (111 pp, sha256 9576a1e73e5dac60, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF