component
ADS131M04IPWT
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ADS131M04IPWT
Texas Instruments · Analog To Digital Converters (ADCs) · TSSOP-20
ADS131M04IPWT from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | Analog supply; connect a 1-µF capacitor to AGND. |
| 2 | AGND | power_in | Analog ground. |
| 3 | AIN0P | input | Positive analog input 0. |
| 4 | AIN0N | input | Negative analog input 0. |
| 5 | AIN1N | input | Negative analog input 1. |
| 6 | AIN1P | input | Positive analog input 1. |
| 7 | AIN2P | input | Positive analog input 2. |
| 8 | AIN2N | input | Negative analog input 2. |
| 9 | AIN3N | input | Negative analog input 3. |
| 10 | AIN3P | input | Positive analog input 3. |
| 11 | SYNC/RESET | input | Conversion synchronization or system reset; active low. |
| 12 | CS | input | Chip select; active low. |
| 13 | DRDY | output | Data ready; active low. |
| 14 | SCLK | input | Serial data clock. |
| 15 | DOUT | output | Serial data output. |
| 16 | DIN | input | Serial data input. |
| 17 | CLKIN | input | Master clock input. |
| 18 | CAP | output | Digital low-dropout (LDO) regulator output; connect a 220-nF capacitor to DGND. |
| 19 | DGND | power_in | Digital ground. |
| 20 | DVDD | power_in | Digital I/O supply; connect a 1-µF capacitor to DGND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Data Converters |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power-supply voltage AVDD to AGND | -0.3 | 3.9 | V | 5 | |||
| AGND to DGND | -0.3 | 0.3 | V | 5 | |||
| DVDD to DGND | -0.3 | 3.9 | V | 5 | |||
| DVDD to DGND, CAP tied to DVDD | -0.3 | 2.2 | V | CAP tied to DVDD | 5 | ||
| CAP to DGND | -0.3 | 2.2 | V | 5 | |||
| Analog input voltage AINxP, AINxN | -1.6 | V | Min printed as AGND, 1.6 V (value relative to AGND); max printed as AVDD + 0.3 V (not numeric) | 5 | |||
| Digital input voltage CS, CLKIN, DIN, SCLK, SYNC/RESET | -0.3 | V | Min printed as DGND, 0.3 V (value relative to DGND); max printed as DVDD + 0.3 V (not numeric) | 5 | |||
| Input current, continuous, all pins except power-supply pins | -10 | 10 | mA | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | Tstg | -60 | 150 | °C | 5 | ||
| ESD, Human body model (HBM) | V(ESD) | -2000 | 2000 | V | Per ANSI/ESDA/JEDEC JS-001 | 5 | |
| ESD, Charged device model (CDM) | V(ESD) | -500 | 500 | V | Per JEDEC JESD22-C101 | 5 | |
| Analog power supply, normal operating modes | AVDD | 2.7 | 3 | 3.6 | V | AVDD to AGND, normal operating modes | 6 |
| Analog power supply, standby and current-detect modes | AVDD | 2.4 | 3 | 3.6 | V | AVDD to AGND, standby and current-detect modes | 6 |
| AGND to DGND | -0.3 | 0 | 0.3 | V | 6 | ||
| Digital power supply | DVDD | 2.7 | 3 | 3.6 | V | DVDD to DGND | 6 |
| Digital power supply, digital LDO bypassed | DVDD | 1.65 | 1.8 | 2 | V | DVDD to DGND, DVDD shorted to CAP (digital LDO bypassed) | 6 |
| Absolute input voltage | VAINxP, VAINxN | -1.3 | V | Gain = 1, 2, or 4; min printed as AGND, 1.3 V (value relative to AGND); max printed as AVDD (not numeric) | 6 | ||
| External clock frequency, high-resolution mode | fCLKIN | 0.3 | 8.192 | 8.4 | MHz | High-resolution mode | 6 |
| External clock frequency, low-power mode | fCLKIN | 0.3 | 4.096 | 4.15 | MHz | Low-power mode | 6 |
| External clock frequency, very-low-power mode | fCLKIN | 0.3 | 2.048 | 2.08 | MHz | Very-low-power mode | 6 |
| Duty cycle, external clock | 40 | 50 | 60 | % | 6 | ||
| Operating ambient temperature | TA | -40 | 125 | °C | 6 | ||
| Gain error | -0.1 | 0.1 | % | 7 | |||
| Offset error (input referred) | -175 | 175 | µV | 7 | |||
| Offset error (input referred), global-chop mode, channel 0 | -35 | 35 | µV | Global-chop mode, channel 0 | 7 | ||
| Offset error (input referred), global-chop mode, channels 1-3 | -15 | 15 | µV | Global-chop mode, channels 1-3 | 7 | ||
| Internal reference accuracy | -0.1 | 0.1 | % | TA = 25°C | 8 | ||
| Dynamic range | 99 | 102 | dB | Gain = 1 | 7 | ||
| Internal voltage reference temperature drift | 7.5 | 20 | ppm/°C | 8 | |||
| Differential input impedance (as current per volt) | Zin | -1 | 1 | µA/V | Gain = 8, 16, 32, 64, or 128; specified as current per volt, printed ±1 µA/V | 7 | |
| Logic input level, low | VIL | 0.2 | DVDD | Printed as 0.2 DVDD (fraction of DVDD) | 8 | ||
| Logic input level, high | VIH | 0.8 | DVDD | Printed as 0.8 DVDD (fraction of DVDD) | 8 | ||
| Logic output level, low | VOL | 0.2 | DVDD | IOL = -1 mA; printed as 0.2 DVDD | 8 | ||
| Logic output level, high | VOH | 0.8 | DVDD | IOH = 1 mA; printed as 0.8 DVDD | 8 | ||
| Input current | IIN | -1 | 1 | µA | DGND < VDigital Input < DVDD | 8 | |
| Analog supply current, high-resolution mode | IAVDD | 3.5 | 4 | mA | High-resolution mode | 8 | |
| Analog supply current, low-power mode | IAVDD | 2 | 2.2 | mA | Low-power mode | 8 | |
| Analog supply current, very-low-power mode | IAVDD | 1 | 1.2 | mA | Very-low-power mode | 8 | |
| Digital supply current, high-resolution mode | IDVDD | 0.4 | 0.5 | mA | High-resolution mode; SPI idle | 8 | |
| Digital supply current, low-power mode | IDVDD | 0.2 | 0.3 | mA | Low-power mode; SPI idle | 8 | |
| Digital supply current, very-low-power mode | IDVDD | 0.1 | 0.2 | mA | Very-low-power mode; SPI idle | 8 | |
| Internal voltage reference | VREF | 1.2 | V | 8 | |||
| Differential input impedance | Zin | 300 | kΩ | Gain = 1, 2, or 4 | 7 | ||
| Input bias current | IB | 0.6 | µA | Gain = 1, 2, or 4, VINP = VINN = 0 V, IB = (IBP + IBN) / 2 | 7 | ||
| Input bias current | IB | 0.2 | µA | Gain = 8, 16, 32, 64 or 128, VINP = VINN = 0 V | 7 | ||
| Offset drift | 300 | nV/°C | 7 | ||||
| Gain drift | 1 | ppm/°C | 7 | ||||
| Integral nonlinearity (best fit) | INL | 6 | ppm of FSR | Best fit | 7 | ||
| Input-referred noise | 5.35 | µVRMS | 7 | ||||
| Startup time | 0.5 | ms | Measured from supplies at 90% to first DRDY falling edge | 7 | |||
| Analog supply current, standby mode | IAVDD | 0.3 | µA | Standby mode | 8 | ||
| Digital supply current, standby mode | IDVDD | 1 | µA | Standby mode | 8 | ||
| Junction-to-ambient thermal resistance, PW (TSSOP) | RθJA | 94.9 | °C/W | PW (TSSOP), 20 pins | 6 | ||
| Junction-to-case (top) thermal resistance, PW (TSSOP) | RθJC(top) | 34.9 | °C/W | PW (TSSOP), 20 pins | 6 | ||
| Junction-to-board thermal resistance, PW (TSSOP) | RθJB | 46.4 | °C/W | PW (TSSOP), 20 pins | 6 |
CAD (KiCad official)
- Symbol:
ADS131M04IPWT - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
ads131m04ipwt-etched.step/ads131m04ipwt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads131m04ipwt.step/ads131m04ipwt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (105 pp, sha256
9045cd7c70e4d8dc, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).