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ADS131A04IPBS

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Texas Instruments Analog Front End (AFE), TQFP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADS131A04IPBS

Texas Instruments · Analog Front End (AFE) · TQFP-32(5x5)

ADS131A04IPBS from Texas Instruments, in a TQFP-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN1N input Negative analog input 1.
2 AIN1P input Positive analog input 1.
3 AIN2N input Negative analog input 2.
4 AIN2P input Positive analog input 2.
5 AIN3N input Negative analog input 3.
6 AIN3P input Positive analog input 3.
7 AIN4N input Negative analog input 4.
8 AIN4P input Positive analog input 4.
9 AVDD power_in Positive analog power supply; requires 1-µF bypass capacitor to AVSS.
10 AVSS power_in Negative analog power supply.
11 VNCP power_out Negative charge pump output; requires 270-nF capacitor to AVSS when enabled or direct connection to AVSS when disabled.
12 REFP output Positive reference voltage output; requires 1-µF bypass capacitor to REFN.
13 REFN input Negative reference voltage input; connect to AVSS.
14 REFEXT input Buffered external reference voltage input; requires 1-µF bypass capacitor to AVSS when using internal reference.
15 IOVDD power_in Digital I/O supply voltage; requires 1-µF bypass capacitor to GND.
16 RESV input Reserved pin; must connect to IOVDD.
17 RESET input System reset input; active low.
18 DONE output Communication done signal output; active low.
19 DRDY bidirectional Data ready signal; active low; provides host interrupt and multi-device synchronization.
20 DIN input Serial data input.
21 DOUT output Serial data output; requires 100-kΩ pullup resistor to IOVDD.
22 SCLK bidirectional Serial data clock.
23 CS input Chip select input; active low.
24 NC unconnected No connection.
25 XTAL1/CLKIN input Master clock or crystal oscillator input.
26 XTAL2 output Crystal oscillator connection; leave floating if oscillator unused.
27 GND power_in Digital ground.
28 CAP power_out Internal LDO regulator output; requires 1-µF bypass capacitor to GND.
29 IOVDD power_in Digital I/O supply voltage; requires 1-µF bypass capacitor to GND.
30 M0 input SPI mode select: IOVDD for asynchronous interrupt mode, GND for synchronous master mode, unconnected for synchronous slave mode.
31 M1 input SPI word transfer size: IOVDD for 32-bit, GND for 24-bit, unconnected for 16-bit mode.
32 M2 input Hamming code enable: IOVDD for validation on, GND for validation off, unconnected (reserved, do not use).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-32(5x5)
Category Data Acquisition
Pins 32

CAD (KiCad official)

  • Symbol: ADS131A04IPBS
  • Footprint: Package_QFP:TQFP-32_5x5mm_P0.5mm
  • 3D model: TQFP-32(5x5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.1 mm nominal TQFP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ads131a04ipbs-etched.step / ads131a04ipbs-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads131a04ipbs.step / ads131a04ipbs.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (92 pp, sha256 a195fbfd42808a88, retrieved 2026-10-06, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF