ADS1294IPAG

{
  "schema_version": 1,
  "type": "component",
  "slug": "ads1294ipag",
  "title": "ADS1294IPAG",
  "brief": "Texas Instruments Analog Front End (AFE), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "data acquisition",
    "ads1294ipag",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "ADS1294IPAG",
    "manufacturer": "Texas Instruments",
    "package": "TQFP-64(10x10)",
    "pin_count": 64,
    "category": "Data Acquisition",
    "subcategory": "Analog Front End (AFE)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ads1294",
    "parts": {
      "symbol": "ads1294ipag.kicad_sym",
      "footprint": "ads1294ipag.kicad_mod",
      "model_3d": "ads1294ipag-hero.glb",
      "model_3d_plain": "ads1294ipag.glb",
      "model_3d_step": "ads1294ipag-etched.step",
      "model_3d_step_plain": "ads1294ipag.step",
      "lbr": "ads1294ipag.lbr"
    },
    "distributor_links": {
      "lcsc": "C1520662",
      "digikey": "296-27932-ND",
      "mouser": "595-ADS1294IPAG"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T20:44:10Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-27932-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-ADS1294IPAG",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "IN8N",
        "type": "input",
        "description": "Differential analog negative input 8, used only on ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "2",
        "name": "IN8P",
        "type": "input",
        "description": "Differential analog positive input 8, used only on ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "3",
        "name": "IN7N",
        "type": "input",
        "description": "Differential analog negative input 7, used only on ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "4",
        "name": "IN7P",
        "type": "input",
        "description": "Differential analog positive input 7, used only on ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "5",
        "name": "IN6N",
        "type": "input",
        "description": "Differential analog negative input 6, used on ADS1296 and ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "6",
        "name": "IN6P",
        "type": "input",
        "description": "Differential analog positive input 6, used on ADS1296 and ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "7",
        "name": "IN5N",
        "type": "input",
        "description": "Differential analog negative input 5, used on ADS1296 and ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "8",
        "name": "IN5P",
        "type": "input",
        "description": "Differential analog positive input 5, used on ADS1296 and ADS1298; tie to AVDD if unused, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "9",
        "name": "IN4N",
        "type": "input",
        "description": "Differential analog negative input 4; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "10",
        "name": "IN4P",
        "type": "input",
        "description": "Differential analog positive input 4; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "11",
        "name": "IN3N",
        "type": "input",
        "description": "Differential analog negative input 3; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "12",
        "name": "IN3P",
        "type": "input",
        "description": "Differential analog positive input 3; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "13",
        "name": "IN2N",
        "type": "input",
        "description": "Differential analog negative input 2; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "14",
        "name": "IN2P",
        "type": "input",
        "description": "Differential analog positive input 2; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "15",
        "name": "IN1N",
        "type": "input",
        "description": "Differential analog negative input 1; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "16",
        "name": "IN1P",
        "type": "input",
        "description": "Differential analog positive input 1; full-scale differential input is ±VREF/gain, and analog inputs must stay between AVSS - 0.3 V and AVDD + 0.3 V."
      },
      {
        "number": "17",
        "name": "TESTP_PACE_OUT1",
        "type": "bidirectional",
        "description": "Internal test signal or single-ended buffered output for pace detection, selected by register settings; can also serve as an auxiliary differential input when hardware pace detection is not used."
      },
      {
        "number": "18",
        "name": "TESTN_PACE_OUT2",
        "type": "bidirectional",
        "description": "Internal test signal or single-ended buffered output for pace detection, selected by register settings; can also serve as an auxiliary differential input when hardware pace detection is not used."
      },
      {
        "number": "19",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply; AVDD - AVSS must be 2.7 V to 5.25 V and it should be decoupled with 1 µF and 0.1 µF ceramic capacitors."
      },
      {
        "number": "20",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground, the reference for AVDD and the internal reference generation."
      },
      {
        "number": "21",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply; AVDD - AVSS must be 2.7 V to 5.25 V and it should be decoupled with 1 µF and 0.1 µF ceramic capacitors."
      },
      {
        "number": "22",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply; AVDD - AVSS must be 2.7 V to 5.25 V and it should be decoupled with 1 µF and 0.1 µF ceramic capacitors."
      },
      {
        "number": "23",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground, the reference for AVDD and the internal reference generation."
      },
      {
        "number": "24",
        "name": "VREFP",
        "type": "bidirectional",
        "description": "Positive reference input/output; the reference is VREFP - VREFN, which is 2.5 V on a 3 V supply or 4 V on a 5 V supply, and VREFP must be between AVSS and AVSS + 2.5 V."
      },
      {
        "number": "25",
        "name": "VREFN",
        "type": "input",
        "description": "Negative reference input; it must be connected to AVSS when the internal reference is used."
      },
      {
        "number": "26",
        "name": "VCAP4",
        "type": "passive",
        "description": "Analog bypass capacitor node; connect a 1 µF capacitor to AVSS."
      },
      {
        "number": "27",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; may be tied to AVDD or AVSS through a 10 kΩ resistor."
      },
      {
        "number": "28",
        "name": "VCAP1",
        "type": "passive",
        "description": "Analog bypass capacitor node; connect a 22 µF capacitor to AVSS."
      },
      {
        "number": "29",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; may be tied to AVDD or AVSS through a 10 kΩ resistor."
      },
      {
        "number": "30",
        "name": "VCAP2",
        "type": "passive",
        "description": "Analog bypass capacitor node; connect a 1 µF capacitor to AVSS."
      },
      {
        "number": "31",
        "name": "RESV1",
        "type": "input",
        "description": "Reserved for future use; must be connected to logic low (DGND)."
      },
      {
        "number": "32",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground, the reference for AVDD and the internal reference generation."
      },
      {
        "number": "33",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "34",
        "name": "DIN",
        "type": "input",
        "description": "SPI data input; it is latched on the falling edge of SCLK."
      },
      {
        "number": "35",
        "name": "PWDN",
        "type": "input",
        "description": "Power-down input, active low; pulling it low powers down all on-chip circuits."
      },
      {
        "number": "36",
        "name": "RESET",
        "type": "input",
        "description": "System reset input, active low; hold low for the minimum pulse width before releasing it."
      },
      {
        "number": "37",
        "name": "CLK",
        "type": "bidirectional",
        "description": "External master clock input or internal oscillator clock output; the external clock is 2.048 MHz nominal (1.94 MHz to 2.25 MHz) when CLKSEL = 0."
      },
      {
        "number": "38",
        "name": "START",
        "type": "input",
        "description": "Start conversion input; the digital input must stay within DGND to DVDD."
      },
      {
        "number": "39",
        "name": "CS",
        "type": "input",
        "description": "SPI chip select, active low; it must stay low for the full serial transaction."
      },
      {
        "number": "40",
        "name": "SCLK",
        "type": "input",
        "description": "SPI serial clock input, with Schmitt-trigger input; it should be kept free of noise."
      },
      {
        "number": "41",
        "name": "DAISY_IN",
        "type": "input",
        "description": "Daisy-chain input; tie to DGND when not used."
      },
      {
        "number": "42",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "General-purpose digital I/O pin 1; configured as input or output by the GPIO register, and must be driven when used as an input (tie to DGND if unused)."
      },
      {
        "number": "43",
        "name": "DOUT",
        "type": "output",
        "description": "SPI data output; data is shifted out on the rising edge of SCLK, and the pin goes high impedance when CS is high."
      },
      {
        "number": "44",
        "name": "GPIO2",
        "type": "bidirectional",
        "description": "General-purpose digital I/O pin 2; configured as input or output by the GPIO register, and must be driven when used as an input (tie to DGND if unused)."
      },
      {
        "number": "45",
        "name": "GPIO3",
        "type": "bidirectional",
        "description": "General-purpose digital I/O pin 3; configured as input or output by the GPIO register, and must be driven when used as an input (tie to DGND if unused)."
      },
      {
        "number": "46",
        "name": "GPIO4",
        "type": "bidirectional",
        "description": "General-purpose digital I/O pin 4; configured as input or output by the GPIO register, and must be driven when used as an input (tie to DGND if unused)."
      },
      {
        "number": "47",
        "name": "DRDY",
        "type": "output",
        "description": "Data ready output, active low; it goes low when new conversion data is available."
      },
      {
        "number": "48",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital supply; DVDD must be 1.65 V to 3.6 V and it should be decoupled with 1 µF and 0.1 µF capacitors."
      },
      {
        "number": "49",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "50",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital supply; DVDD must be 1.65 V to 3.6 V and it should be decoupled with 1 µF and 0.1 µF capacitors."
      },
      {
        "number": "51",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "52",
        "name": "CLKSEL",
        "type": "input",
        "description": "Master clock select; low selects the external clock on CLK, high selects the internal oscillator."
      },
      {
        "number": "53",
        "name": "AVSS1",
        "type": "power_in",
        "description": "Analog ground for the charge pump; connect it in a star configuration to AVSS."
      },
      {
        "number": "54",
        "name": "AVDD1",
        "type": "power_in",
        "description": "Analog supply for the charge pump, which has transients at fCLK; connect it in a star configuration to AVDD."
      },
      {
        "number": "55",
        "name": "VCAP3",
        "type": "passive",
        "description": "Internally generated AVDD + 1.9 V node; connect a 1 µF capacitor to AVSS."
      },
      {
        "number": "56",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply; AVDD - AVSS must be 2.7 V to 5.25 V and it should be decoupled with 1 µF and 0.1 µF ceramic capacitors."
      },
      {
        "number": "57",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground, the reference for AVDD and the internal reference generation."
      },
      {
        "number": "58",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground, the reference for AVDD and the internal reference generation."
      },
      {
        "number": "59",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply; AVDD - AVSS must be 2.7 V to 5.25 V and it should be decoupled with 1 µF and 0.1 µF ceramic capacitors."
      },
      {
        "number": "60",
        "name": "RLDREF",
        "type": "input",
        "description": "Right-leg drive non-inverting input, used as the RLD reference voltage."
      },
      {
        "number": "61",
        "name": "RLDINV",
        "type": "bidirectional",
        "description": "Right-leg drive inverting input; it connects to the RLD amplifier feedback network."
      },
      {
        "number": "62",
        "name": "RLDIN",
        "type": "input",
        "description": "Multiplexer input for the right-leg drive signal; tie it to the channel mux per the datasheet configuration (tie to AVDD if unused)."
      },
      {
        "number": "63",
        "name": "RLDOUT",
        "type": "output",
        "description": "Right-leg drive amplifier output, which drives the patient through the external feedback network."
      },
      {
        "number": "64",
        "name": "WCT",
        "type": "output",
        "description": "Wilson central terminal output; its drive is limited, so it must be buffered before driving low-impedance loads and it is intended for very high input impedance (typically above 500 MΩ)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Source is a Chinese-translated TI datasheet (SBAS459 / ZHCS313K). Pin numbers and names were taken f; Pin types are KiCad-class mappings of the datasheet's labels: analog inputs mapped to input, analog ; Pins 1-8 (IN5-IN8) are labeled as used only on ADS1296/ADS1298 in the datasheet. For the 4-channel A"
        ],
        "pages_sent": 80,
        "cost_usd": 0.4092,
        "at": "2026-10-08T20:43:19"
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      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ads1294",
        "pages": 113,
        "sha256": "a8830f56bfd11d1b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 64,
        "described": 64,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
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        "footprint_binding": "identity",
        "sha256": "60567e81b0770b6c519104183a7a05ba52dddc11146b5fbe21434fbb5801696c",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "sha256": "7b716f218250704e4acd775a8394a05e0a300a7c20b0f3357b7befd948aa172d",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TQFP-64(10x10)",
      "Category": "Data Acquisition",
      "Pins": "64"
    }
  },
  "variants": [],
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  "discovery_pitch": "ADS1294IPAG (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
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