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ADS1293CISQE

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Texas Instruments Analog Front End (AFEs), WQFN-28(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADS1293CISQE

Texas Instruments · Analog Front End (AFEs) · WQFN-28(5x5)

ADS1293CISQE from Texas Instruments, in a WQFN-28(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Electrode input signal IN1, one of six analog electrode inputs (IN1 to IN6) on the front end.
2 IN2 input Electrode input signal IN2, one of six analog electrode inputs (IN1 to IN6) on the front end.
3 IN3 input Electrode input signal IN3, one of six analog electrode inputs (IN1 to IN6) on the front end.
4 IN4 input Electrode input signal IN4, one of six analog electrode inputs (IN1 to IN6) on the front end.
5 IN5 input Electrode input signal IN5, one of six analog electrode inputs (IN1 to IN6) on the front end.
6 IN6 input Electrode input signal IN6, one of six analog electrode inputs (IN1 to IN6) on the front end.
7 WCT output Wilson reference output or analog pace channel output.
8 CMOUT output Common-mode detector output.
9 RLDOUT output Right-leg drive amplifier output, connected to the right-leg electrode.
10 RLDINV input Right-leg drive amplifier negative input.
11 RLDIN bidirectional Right-leg drive amplifier positive input or analog pace channel output.
12 RLDREF output Internal right-leg drive reference output.
13 SYNCB bidirectional Sync bar; multiple-chip synchronization signal input or output.
14 VSSIO power_in Digital input/output supply ground.
15 ALARMB output Alarm bar output, asserted low on a new alarm condition (open-drain).
16 CSB input Chip-select bar digital input.
17 SCLK input Serial clock digital input.
18 SDI input Serial data input.
19 SDO output Serial data output.
20 DRDYB output Data ready bar digital output.
21 CLK bidirectional Internal clock output or external clock input (409.6 kHz clock).
22 VDDIO power_in Digital input/output supply, 1.65 V to 3.6 V.
23 XTAL1 input External crystal connection for the clock oscillator (4.096 MHz crystal).
24 XTAL2 input External crystal connection for the clock oscillator (4.096 MHz crystal).
25 RSTB input Reset bar digital input.
26 CVREF bidirectional External capacitor for the internal reference voltage; can also be driven with an external reference when SHDN_REF is set.
27 VSS power_in Analog power supply ground.
28 VDD power_in Positive analog power supply, 2.7 V to 5.5 V.
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-28(5x5)
Category ADC/DAC/Data Conversion
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog Supply Voltage VDD -0.3 6 V 4
Digital Supply Voltage VDDIO -0.3 6 V 4
Voltage on any Input Pin -0.3 V Upper limit printed as (VDD + 0.3) 4
Input Current at Any Pin -10 10 mA 4
Max Junction Temperature 150 °C 4
Storage temperature Tstg -60 150 °C 4
Analog Supply Voltage VDD 2.7 5.5 V 4
Digital I/O Supply Voltage 1.65 3.6 V VDD > 3.6 V 4
Digital I/O Supply Voltage 1.65 V VDD ≤ 3.6 V; upper limit printed as VDD 4
Full Scale Differential Input Voltage Range DIVR -400 400 mV 4
Temperature Range -20 85 °C 4
Junction-to-ambient thermal resistance RθJA 29 °C/W LLP 28 pins 4
Input Bias Current IB -175 175 pA TA = 25°C, LOD OFF 5
Input Bias Current IB -13 13 nA TA = 85°C, LOD OFF, TMIN ≤ TA ≤ TMAX 5
Differential Input Voltage Range DIVR -400 400 mV TMIN ≤ TA ≤ TMAX 6
Input-Referred Offset Voltage VOS -16 16 µV 6
Input-Referred Offset Voltage VOS -87 87 µV TMIN ≤ TA ≤ TMAX 6
Internal Reference Accuracy -0.5 0.5 % 6
Internal Reference Drift -11 11 ppm/°C 6
Division Accuracy -0.25 0.25 % 6
Division Accuracy -0.1 0.1 % 6
RS-ECG Sample Rate RS-ECG 25 6400 sps ECG Channel; TMIN ≤ TA ≤ TMAX 6
RS-PACE Sample Rate RS-PACE 3.2 25.6 ksps PACE Channel; TMIN ≤ TA ≤ TMAX 6
Input-Referred Offset Voltage VOS -5 5 mV RLD Amp 7
Excitation Current Accuracy IEXCTOL -25 25 % 7
Excitation Frequency FEXC 6.1 Hz AC LOD mode, programmable, minimum 7
Excitation Frequency FEXC 12.5 kHz AC LOD mode, programmable, maximum 7
Input-Referred Offset Voltage VOS -1.3 1.3 mV Analog Pace Channel 8
Differential Input Voltage Range DIVR -330 330 mV 2.7 V ≤ VDD < 3.3 V; TMIN ≤ TA ≤ TMAX 8
Differential Input Voltage Range DIVR -400 400 mV 3.3 V ≤ VDD; TMIN ≤ TA ≤ TMAX 8
External Clock Frequency fEXT 370 409.6 450 kHz TMIN ≤ TA ≤ TMAX 8
External Clock Duty Cycle 40 50 60 % TMIN ≤ TA ≤ TMAX 8
Digital IO Leakage Current IIOHL -1 1 µA SYNCB and RESETB pins, with 1-MΩ internal pullup resistor 8
Digital IO Leakage Current IIOHL -500 500 nA Other digital I/O pins; TMIN ≤ TA ≤ TMAX 8

CAD (KiCad official)

  • Symbol: ADS1293CISQE
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: WQFN-28(5x5) (KiCad packages3D, STEP)
  • 3D model files: ads1293cisqe-etched.step / ads1293cisqe-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1293cisqe.step / ads1293cisqe.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (78 pp, sha256 60d4a86b83c71b8b, retrieved 2026-10-28, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF