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Initial commit: component/ads1293cisq

Ray ·3e5d1cac61 ·1mo ago
2 files changed +337
README.mdadded+66
@@ -0,0 +1,66 @@+# ADS1293CISQ++**Texas Instruments** · Analog Front End (AFE) · QFN-28-EP(5x5)++ADS1293CISQ from Texas Instruments, in a QFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN1 | input | Analog input electrode signal with ±400mV differential range and EMI filtering. |+| 2 | IN2 | input | Analog input electrode signal with ±400mV differential range and EMI filtering. |+| 3 | IN3 | input | Analog input electrode signal with ±400mV differential range and EMI filtering. |+| 4 | IN4 | input | Analog input electrode signal with ±400mV differential range and EMI filtering. |+| 5 | IN5 | input | Analog input electrode signal with ±400mV differential range and EMI filtering. |+| 6 | IN6 | input | Analog input electrode signal with ±400mV differential range and EMI filtering. |+| 7 | WCT | output | Wilson Central Terminal reference output or analog pace channel output. |+| 8 | CMOUT | output | Common-mode detector output averaging input electrode voltages. |+| 9 | RLDOUT | output | Right-leg drive amplifier output for patient electrode biasing. |+| 10 | RLDINV | input | Right-leg drive amplifier inverting input. |+| 11 | RLDIN | bidirectional | Right-leg drive amplifier non-inverting input or analog pace channel output. |+| 12 | RLDREF | output | Internal reference output generating VDD/2.2 for common-mode bias. |+| 13 | SYNCB | bidirectional | Synchronization signal input or output for multi-chip synchronization. |+| 14 | VSSIO | power_in | Digital I/O supply ground connection. |+| 15 | ALARMB | output | Active-low open-drain output indicating system alarm conditions. |+| 16 | CSB | input | Active-low chip select for SPI communication. |+| 17 | SCLK | input | Serial clock input for SPI with maximum frequency of 20 MHz. |+| 18 | SDI | input | Serial data input sampled on rising edge of SCLK. |+| 19 | SDO | output | Serial data output driven on falling edge of SCLK. |+| 20 | DRDYB | output | Active-low data ready output asserted when new conversion data available. |+| 21 | CLK | bidirectional | Bi-directional 409.6 kHz clock output or external clock input. |+| 22 | VDDIO | power_in | Digital I/O supply voltage, 1.65V to 3.6V or up to VDD if VDD ≤ 3.6V. |+| 23 | XTAL1 | input | External crystal for clock oscillator connection with 20pF load capacitor, nominal frequency 4.096 MHz. |+| 24 | XTAL2 | input | External crystal for clock oscillator connection with 20pF load capacitor, nominal frequency 4.096 MHz. |+| 25 | RSTB | input | Active-low reset input. |+| 26 | CVREF | bidirectional | Internal 2.4V reference output or external reference input, requires 1µF low-ESR bypass capacitor. |+| 27 | VSS | power_in | Analog supply ground connection. |+| 28 | VDD | power_in | Analog supply voltage input, 2.7V to 5.5V range. |+| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | QFN-28-EP(5x5) |+| Category | Data Acquisition |+| Pins | 29 |++## CAD (KiCad official)++- Symbol: `ADS1293CISQ`+- Footprint: `Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm`+- 3D model: QFN-28-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `ads1293cisq-etched.step` / `ads1293cisq-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads1293cisq.step` / `ads1293cisq.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads1293) (78 pp, sha256 `d59fe1b658d0e77f`, retrieved 2026-09-18, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads1293cisq-datasheet.pdf)
page.jsonadded+271
@@ -0,0 +1,271 @@+{+  "slug": "ads1293cisq",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Analog Front End (AFE), QFN-28-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "ads1293cisq",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ads1293cisq.kicad_sym",+    "ads1293cisq.kicad_mod",+    "ads1293cisq.glb",+    "ads1293cisq.step",+    "ads1293cisq.lbr",+    "docs/hero.png",+    "docs/ads1293cisq-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ADS1293CISQ",+    "manufacturer": "Texas Instruments",+    "package": "QFN-28-EP(5x5)",+    "pin_count": 29,+    "category": "Data Acquisition",+    "subcategory": "Analog Front End (AFE)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/ads1293",+    "parts": {+      "symbol": "ads1293cisq.kicad_sym",+      "footprint": "ads1293cisq.kicad_mod",+      "model_3d": "ads1293cisq-etched.glb",+      "model_3d_plain": "ads1293cisq.glb",+      "model_3d_step": "ads1293cisq-etched.step",+      "model_3d_step_plain": "ads1293cisq.step",+      "lbr": "ads1293cisq.lbr"+    },+    "distributor_links": {+      "lcsc": "C181260"+    },+    "pins": [+      {+        "number": "1",+        "name": "IN1",+        "type": "input",+        "description": "Analog input electrode signal with ±400mV differential range and EMI filtering."+      },+      {+        "number": "2",+        "name": "IN2",+        "type": "input",+        "description": "Analog input electrode signal with ±400mV differential range and EMI filtering."+      },+      {+        "number": "3",+        "name": "IN3",+        "type": "input",+        "description": "Analog input electrode signal with ±400mV differential range and EMI filtering."+      },+      {+        "number": "4",+        "name": "IN4",+        "type": "input",+        "description": "Analog input electrode signal with ±400mV differential range and EMI filtering."+      },+      {+        "number": "5",+        "name": "IN5",+        "type": "input",+        "description": "Analog input electrode signal with ±400mV differential range and EMI filtering."+      },+      {+        "number": "6",+        "name": "IN6",+        "type": "input",+        "description": "Analog input electrode signal with ±400mV differential range and EMI filtering."+      },+      {+        "number": "7",+        "name": "WCT",+        "type": "output",+        "description": "Wilson Central Terminal reference output or analog pace channel output."+      },+      {+        "number": "8",+        "name": "CMOUT",+        "type": "output",+        "description": "Common-mode detector output averaging input electrode voltages."+      },+      {+        "number": "9",+        "name": "RLDOUT",+        "type": "output",+        "description": "Right-leg drive amplifier output for patient electrode biasing."+      },+      {+        "number": "10",+        "name": "RLDINV",+        "type": "input",+        "description": "Right-leg drive amplifier inverting input."+      },+      {+        "number": "11",+        "name": "RLDIN",+        "type": "bidirectional",+        "description": "Right-leg drive amplifier non-inverting input or analog pace channel output."+      },+      {+        "number": "12",+        "name": "RLDREF",+        "type": "output",+        "description": "Internal reference output generating VDD/2.2 for common-mode bias."+      },+      {+        "number": "13",+        "name": "SYNCB",+        "type": "bidirectional",+        "description": "Synchronization signal input or output for multi-chip synchronization."+      },+      {+        "number": "14",+        "name": "VSSIO",+        "type": "power_in",+        "description": "Digital I/O supply ground connection."+      },+      {+        "number": "15",+        "name": "ALARMB",+        "type": "output",+        "description": "Active-low open-drain output indicating system alarm conditions."+      },+      {+        "number": "16",+        "name": "CSB",+        "type": "input",+        "description": "Active-low chip select for SPI communication."+      },+      {+        "number": "17",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input for SPI with maximum frequency of 20 MHz."+      },+      {+        "number": "18",+        "name": "SDI",+        "type": "input",+        "description": "Serial data input sampled on rising edge of SCLK."+      },+      {+        "number": "19",+        "name": "SDO",+        "type": "output",+        "description": "Serial data output driven on falling edge of SCLK."+      },+      {+        "number": "20",+        "name": "DRDYB",+        "type": "output",+        "description": "Active-low data ready output asserted when new conversion data available."+      },+      {+        "number": "21",+        "name": "CLK",+        "type": "bidirectional",+        "description": "Bi-directional 409.6 kHz clock output or external clock input."+      },+      {+        "number": "22",+        "name": "VDDIO",+        "type": "power_in",+        "description": "Digital I/O supply voltage, 1.65V to 3.6V or up to VDD if VDD ≤ 3.6V."+      },+      {+        "number": "23",+        "name": "XTAL1",+        "type": "input",+        "description": "External crystal for clock oscillator connection with 20pF load capacitor, nominal frequency 4.096 MHz."+      },+      {+        "number": "24",+        "name": "XTAL2",+        "type": "input",+        "description": "External crystal for clock oscillator connection with 20pF load capacitor, nominal frequency 4.096 MHz."+      },+      {+        "number": "25",+        "name": "RSTB",+        "type": "input",+        "description": "Active-low reset input."+      },+      {+        "number": "26",+        "name": "CVREF",+        "type": "bidirectional",+        "description": "Internal 2.4V reference output or external reference input, requires 1µF low-ESR bypass capacitor."+      },+      {+        "number": "27",+        "name": "VSS",+        "type": "power_in",+        "description": "Analog supply ground connection."+      },+      {+        "number": "28",+        "name": "VDD",+        "type": "power_in",+        "description": "Analog supply voltage input, 2.7V to 5.5V range."+      },+      {+        "number": "29",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: XTAL1 and XTAL2 are both listed as 'Digital Input' type in the pin functions table, but typical crys; The pin functions table lists 'DAP' (exposed thermal pad) marked as 'No connect' without a formal pi",+          "exposed pad 29 added from the footprint",+          "4/29 pins cited to the wrong page (name found elsewhere): ['2:IN2@p3', '3:IN3@p3', '4:IN4@p3', '5:IN5@p3']"+        ],+        "pages_sent": 78,+        "cost_usd": 0.756,+        "at": "2026-09-18T02:33:02"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/ads1293",+        "pages": 78,+        "sha256": "d59fe1b658d0e77f",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 29,+        "described": 29,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file