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Contents

README

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ADS1293CISQ

Texas Instruments · Analog Front End (AFE) · QFN-28-EP(5x5)

ADS1293CISQ from Texas Instruments, in a QFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Analog input electrode signal with ±400mV differential range and EMI filtering.
2 IN2 input Analog input electrode signal with ±400mV differential range and EMI filtering.
3 IN3 input Analog input electrode signal with ±400mV differential range and EMI filtering.
4 IN4 input Analog input electrode signal with ±400mV differential range and EMI filtering.
5 IN5 input Analog input electrode signal with ±400mV differential range and EMI filtering.
6 IN6 input Analog input electrode signal with ±400mV differential range and EMI filtering.
7 WCT output Wilson Central Terminal reference output or analog pace channel output.
8 CMOUT output Common-mode detector output averaging input electrode voltages.
9 RLDOUT output Right-leg drive amplifier output for patient electrode biasing.
10 RLDINV input Right-leg drive amplifier inverting input.
11 RLDIN bidirectional Right-leg drive amplifier non-inverting input or analog pace channel output.
12 RLDREF output Internal reference output generating VDD/2.2 for common-mode bias.
13 SYNCB bidirectional Synchronization signal input or output for multi-chip synchronization.
14 VSSIO power_in Digital I/O supply ground connection.
15 ALARMB output Active-low open-drain output indicating system alarm conditions.
16 CSB input Active-low chip select for SPI communication.
17 SCLK input Serial clock input for SPI with maximum frequency of 20 MHz.
18 SDI input Serial data input sampled on rising edge of SCLK.
19 SDO output Serial data output driven on falling edge of SCLK.
20 DRDYB output Active-low data ready output asserted when new conversion data available.
21 CLK bidirectional Bi-directional 409.6 kHz clock output or external clock input.
22 VDDIO power_in Digital I/O supply voltage, 1.65V to 3.6V or up to VDD if VDD ≤ 3.6V.
23 XTAL1 input External crystal for clock oscillator connection with 20pF load capacitor, nominal frequency 4.096 MHz.
24 XTAL2 input External crystal for clock oscillator connection with 20pF load capacitor, nominal frequency 4.096 MHz.
25 RSTB input Active-low reset input.
26 CVREF bidirectional Internal 2.4V reference output or external reference input, requires 1µF low-ESR bypass capacitor.
27 VSS power_in Analog supply ground connection.
28 VDD power_in Analog supply voltage input, 2.7V to 5.5V range.
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-28-EP(5x5)
Category Data Acquisition
Pins 29

CAD (KiCad official)

  • Symbol: ADS1293CISQ
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: QFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: ads1293cisq-etched.step / ads1293cisq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1293cisq.step / ads1293cisq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (78 pp, sha256 d59fe1b658d0e77f, retrieved 2026-09-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF