component
ADS127L01IPBSR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), TQFP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "ADS127L01IPBSR",
"brief": "Texas Instruments Analog To Digital Converters (ADC), TQFP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "ADS127L01IPBSR",
"manufacturer": "Texas Instruments",
"package": "TQFP-32(5x5)",
"pin_count": 32,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/ads127l01",
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"lcsc": "C2861299",
"digikey": "296-44344-2-ND",
"mouser": "595-ADS127L01IPBSR"
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{
"number": "1",
"name": "LVDD",
"type": "power_in",
"description": "Analog supply pin that is an output of the internal analog LDO with a 1-µF capacitor to AGND when INTLDO=0, and an input to be connected to a 1.8-V supply when INTLDO=1."
},
{
"number": "2",
"name": "CAP1",
"type": "output",
"description": "Modulator common-mode voltage node that requires a 1-µF capacitor connected to AGND."
},
{
"number": "3",
"name": "AINN",
"type": "input",
"description": "Negative analog input."
},
{
"number": "4",
"name": "AINP",
"type": "input",
"description": "Positive analog input."
},
{
"number": "5",
"name": "AGND",
"type": "power_in",
"description": "Analog ground."
},
{
"number": "6",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply that requires a 1-µF capacitor connected to AGND."
},
{
"number": "7",
"name": "REXT",
"type": "input",
"description": "Analog power-scaling bias resistor pin: 60.4 kΩ to AGND for high-resolution (HR) and low-power (LP) modes, or 120 kΩ to AGND for very-low-power (VLP) mode."
},
{
"number": "8",
"name": "INTLDO",
"type": "input",
"description": "LVDD voltage-select digital input, pulled high to AVDD (1 = external LVDD supply) or low to AGND through 10 kΩ (0 = internal LDO)."
},
{
"number": "9",
"name": "REFP",
"type": "input",
"description": "Positive analog reference input that requires a minimum 10-µF capacitor to REFN."
},
{
"number": "10",
"name": "REFN",
"type": "input",
"description": "Negative analog reference input."
},
{
"number": "11",
"name": "CAP2",
"type": "output",
"description": "Reference common-mode voltage node that requires a 1-µF capacitor connected to AGND."
},
{
"number": "12",
"name": "FILTER1",
"type": "input",
"description": "Digital filter select pin (MSB, with FILTER0): 00 = Wideband 1, 01 = Wideband 2, 10 = Low-latency, 11 = reserved; hardware pin to be pulled high to DVDD or low to DGND through 100 kΩ."
},
{
"number": "13",
"name": "FILTER0",
"type": "input",
"description": "Digital filter select pin (LSB, with FILTER1) using the same coding as FILTER1; hardware pin to be pulled high to DVDD or low to DGND through 100 kΩ."
},
{
"number": "14",
"name": "FSMODE",
"type": "input",
"description": "Frame-sync mode select: 0 = slave mode, 1 = master mode, applicable to frame-sync interface only with no effect in SPI mode."
},
{
"number": "15",
"name": "OSR1",
"type": "input",
"description": "Oversampling-ratio select pin (MSB, with OSR0) for the decimation filters; for wideband filters 00/01/10/11 select OSR 32/64/128/256, and for the low-latency filter they select OSR 32/128/512/2048."
},
{
"number": "16",
"name": "OSR0",
"type": "input",
"description": "Oversampling-ratio select pin (LSB, with OSR1) using the coding described for OSR1 and dependent on the FILTER[1:0] setting."
},
{
"number": "17",
"name": "START",
"type": "input",
"description": "Synchronization input used to start or restart a conversion."
},
{
"number": "18",
"name": "DAISYIN",
"type": "input",
"description": "Daisy-chain input that must be tied directly to DGND when devices are not daisy-chained."
},
{
"number": "19",
"name": "DRDY/FSYNC",
"type": "bidirectional",
"description": "In SPI mode this is the active-low data-ready output; in frame-sync mode it is the frame-sync input signal; leave floating or tie to DVDD through high-impedance resistor when unused in SPI mode."
},
{
"number": "20",
"name": "DOUT",
"type": "output",
"description": "Serial data output."
},
{
"number": "21",
"name": "DIN",
"type": "input",
"description": "Serial data input that must be tied directly to DGND when using the frame-sync interface."
},
{
"number": "22",
"name": "SCLK",
"type": "bidirectional",
"description": "Serial clock pin, specified as a digital input/output, serving as the serial clock input."
},
{
"number": "23",
"name": "CS",
"type": "input",
"description": "Chip select that must be tied directly to DGND when using the frame-sync interface."
},
{
"number": "24",
"name": "CLK",
"type": "input",
"description": "Master clock input."
},
{
"number": "25",
"name": "CAP3",
"type": "output",
"description": "Internally generated digital operating voltage that requires a 1-µF capacitor connected to DGND."
},
{
"number": "26",
"name": "DGND",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "27",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply that requires a 1-µF capacitor connected to DGND."
},
{
"number": "28",
"name": "RESET/PWDN",
"type": "input",
"description": "Active-low reset or power-down pin; see the Reset and Power-Down Pin section for hardware design details when using power-down mode."
},
{
"number": "29",
"name": "HR",
"type": "input",
"description": "ADC operating mode select: 1 = high-resolution (HR), 0 = low-power (LP) or very-low-power (VLP), with LP/VLP selected by the REXT resistor value."
},
{
"number": "30",
"name": "FORMAT",
"type": "input",
"description": "Interface select: 0 = SPI interface, 1 = frame-sync interface; hardware pin to be pulled high to DVDD or low to DGND through 100 kΩ."
},
{
"number": "31",
"name": "AGND",
"type": "power_in",
"description": "Analog ground."
},
{
"number": "32",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply that must be decoupled to AGND with a 1-µF capacitor."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
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"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: LVDD is an analog-supply output when INTLDO=0 and an analog-supply input when INTLDO=1; typed as pow; CAP1, CAP2 and CAP3 are datasheet-labelled analog/digital output nodes meant for decoupling capacito; The datasheet describes FILTER[1:0] and OSR[1:0] as two-pin codes; each pin's description is the sha"
],
"pages_sent": 12,
"cost_usd": 0.09,
"at": "2026-10-08T03:40:22"
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"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "TQFP-32(5x5)",
"Category": "Data Acquisition",
"Pins": "32"
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