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ADS1261BIRHBT
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Texas Instruments Analog To Digital Converters (ADCs), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADS1261BIRHBT
Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-32-EP(5x5)
ADS1261BIRHBT from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AINCOM | bidirectional | Analog input common, also usable as the IDAC1, IDAC2 and VBIAS connection. |
| 2 | CAPP | output | PGA output P; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN. |
| 3 | CAPN | output | PGA output N; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN. |
| 4 | AVDD | power_in | Positive analog power supply; AVDD to AVSS absolute maximum is 7 V. |
| 5 | AVSS | power_in | Negative analog power supply; also the connection point for the exposed thermal pad. |
| 6 | REFOUT | output | Internal 2.5-V reference output; connect a 10-µF capacitor to AVSS. |
| 7 | PWDN | input | Power-down control input, active low. |
| 8 | RESET | input | Reset input, active low. |
| 9 | START | input | Start conversion control input, active high. |
| 10 | CS | input | Serial interface chip select, active low; must remain low for the entire data transaction. |
| 11 | SCLK | input | Serial interface shift clock input; Schmitt-triggered input that should be kept noise-free. |
| 12 | DIN | input | Serial interface data input; data are latched on the falling edge of SCLK. |
| 13 | DRDY | output | Data ready indicator output, active low. |
| 14 | DOUT/DRDY | output | Dual-function serial data output and active-low data ready indicator; high-impedance when CS is high. |
| 15 | BYPASS | output | Internal subregulator bypass; connect a 1-µF capacitor to DGND. |
| 16 | DGND | power_in | Digital ground. |
| 17 | DVDD | power_in | Digital power supply; DVDD to DGND absolute maximum is 7 V. |
| 18 | CLKIN | input | Connect to DGND for the internal oscillator, or drive with an external clock input. |
| 19 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 20 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 21 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 22 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 23 | AIN9 | bidirectional | Analog input 9, also usable as IDAC1 and IDAC2 connection. |
| 24 | AIN8 | bidirectional | Analog input 8, also usable as IDAC1 and IDAC2 connection. |
| 25 | AIN7 | bidirectional | Analog input 7, also usable as IDAC1 and IDAC2 connection. |
| 26 | AIN6 | bidirectional | Analog input 6, also usable as IDAC1 and IDAC2 connection. |
| 27 | AIN5 | bidirectional | Analog input 5, also usable as IDAC1/IDAC2, GPIO3 and ACX2. |
| 28 | AIN4 | bidirectional | Analog input 4, also usable as IDAC1/IDAC2, GPIO2 and ACX1. |
| 29 | AIN3 | bidirectional | Analog input 3, also usable as IDAC1/IDAC2, REFN1, GPIO1 and ACX2. |
| 30 | AIN2 | bidirectional | Analog input 2, also usable as IDAC1/IDAC2, REFP1, GPIO0 and ACX1. |
| 31 | AIN1 | bidirectional | Analog input 1, also usable as IDAC1/IDAC2 and REFN0. |
| 32 | AIN0 | bidirectional | Analog input 0, also usable as IDAC1/IDAC2 and REFP0. |
| 33 | Thermal Pad | passive | Exposed thermal pad; connect to AVSS, and the pad must be soldered for mechanical integrity. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | ADC/DAC/Data Conversion |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
ADS1261BIRHBT - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
ads1261birhbt-etched.step/ads1261birhbt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads1261birhbt.step/ads1261birhbt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (92 pp, sha256
0369aa88e789386f, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADS1261BIRHBT
**Texas Instruments** · Analog To Digital Converters (ADCs) · VQFN-32-EP(5x5)
ADS1261BIRHBT from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AINCOM | bidirectional | Analog input common, also usable as the IDAC1, IDAC2 and VBIAS connection. |
| 2 | CAPP | output | PGA output P; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN. |
| 3 | CAPN | output | PGA output N; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN. |
| 4 | AVDD | power_in | Positive analog power supply; AVDD to AVSS absolute maximum is 7 V. |
| 5 | AVSS | power_in | Negative analog power supply; also the connection point for the exposed thermal pad. |
| 6 | REFOUT | output | Internal 2.5-V reference output; connect a 10-µF capacitor to AVSS. |
| 7 | PWDN | input | Power-down control input, active low. |
| 8 | RESET | input | Reset input, active low. |
| 9 | START | input | Start conversion control input, active high. |
| 10 | CS | input | Serial interface chip select, active low; must remain low for the entire data transaction. |
| 11 | SCLK | input | Serial interface shift clock input; Schmitt-triggered input that should be kept noise-free. |
| 12 | DIN | input | Serial interface data input; data are latched on the falling edge of SCLK. |
| 13 | DRDY | output | Data ready indicator output, active low. |
| 14 | DOUT/DRDY | output | Dual-function serial data output and active-low data ready indicator; high-impedance when CS is high. |
| 15 | BYPASS | output | Internal subregulator bypass; connect a 1-µF capacitor to DGND. |
| 16 | DGND | power_in | Digital ground. |
| 17 | DVDD | power_in | Digital power supply; DVDD to DGND absolute maximum is 7 V. |
| 18 | CLKIN | input | Connect to DGND for the internal oscillator, or drive with an external clock input. |
| 19 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 20 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 21 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 22 | NC | unconnected | No connection; electrically float or connect to DGND. |
| 23 | AIN9 | bidirectional | Analog input 9, also usable as IDAC1 and IDAC2 connection. |
| 24 | AIN8 | bidirectional | Analog input 8, also usable as IDAC1 and IDAC2 connection. |
| 25 | AIN7 | bidirectional | Analog input 7, also usable as IDAC1 and IDAC2 connection. |
| 26 | AIN6 | bidirectional | Analog input 6, also usable as IDAC1 and IDAC2 connection. |
| 27 | AIN5 | bidirectional | Analog input 5, also usable as IDAC1/IDAC2, GPIO3 and ACX2. |
| 28 | AIN4 | bidirectional | Analog input 4, also usable as IDAC1/IDAC2, GPIO2 and ACX1. |
| 29 | AIN3 | bidirectional | Analog input 3, also usable as IDAC1/IDAC2, REFN1, GPIO1 and ACX2. |
| 30 | AIN2 | bidirectional | Analog input 2, also usable as IDAC1/IDAC2, REFP1, GPIO0 and ACX1. |
| 31 | AIN1 | bidirectional | Analog input 1, also usable as IDAC1/IDAC2 and REFN0. |
| 32 | AIN0 | bidirectional | Analog input 0, also usable as IDAC1/IDAC2 and REFP0. |
| 33 | Thermal Pad | passive | Exposed thermal pad; connect to AVSS, and the pad must be soldered for mechanical integrity. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | ADC/DAC/Data Conversion |
| Pins | 33 |
## CAD (KiCad official)
- Symbol: `ADS1261BIRHBT`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `ads1261birhbt-etched.step` / `ads1261birhbt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads1261birhbt.step` / `ads1261birhbt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads1261) (92 pp, sha256 `0369aa88e789386f`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ads1261birhbt-datasheet.pdf)