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ADS1259BIPWR

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-20

ADS1259BIPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AINP input Positive analog input.
2 AINN input Negative analog input.
3 RESET/PWDN input Reset/Power-Down; reset is active low and the pin is held low for power-down.
4 START input Start conversions, active high.
5 SYNCOUT output Sync clock output (fCLK/8).
6 CS input SPI chip-select, active low; CS can be tied low.
7 SCLK input SPI clock input.
8 DIN input SPI data input.
9 DOUT output SPI data output.
10 DRDY output Data ready output, active low.
11 XTAL1/CLKIN input External clock input when using an external clock; connect to DGND when using the internal oscillator, or to an external crystal when using the crystal oscillator.
12 XTAL2 passive External crystal connection, otherwise no connection.
13 BYPASS passive Core voltage bypass.
14 DGND power_in Digital ground.
15 DVDD power_in Digital power supply; DVDD range is 2.7V to 5.25V.
16 REFOUT output Positive reference output.
17 VREFP input Positive reference input.
18 VREFN input Negative reference input.
19 AVSS power_in Negative analog power supply and negative reference output; AVSS range is -2.6V to 0V.
20 AVDD power_in Positive analog power supply; AVDD is AVSS + 4.75V to AVSS + 5.25V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Data Acquisition
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
AVDD to AVSS -0.3 5.5 V 2
AVSS to DGND -2.8 0.3 V 2
DVDD to DGND -0.3 5.5 V 2
Input current, momentary -100 100 mA 2
Input current, continuous -10 10 mA 2
Maximum junction temperature 150 °C 2
Operating temperature range -40 125 °C Over operating free-air temperature range 2
Storage temperature range -60 150 °C 2
Offset error -250 250 μV 3
Gain error -0.5 0.5 % 3
Gain drift 0.5 2.5 ppm/°C TA = -40°C to +105°C 3
Offset drift 0.05 0.25 μV/°C TA = -40°C to +105°C 3
Integral nonlinearity 4e-05 0.0003 %FSR Best fit method 3
Out-of-range threshold level -105 105 %FSR 3
Out-of-range threshold accuracy -0.5 0.5 %FSR 3
Reference input range (VREF) VREF 0.5 2.5 V VREF = (VREFP, VREFN) 3
Accuracy -0.2 0.2 % TA = +25°C 3
Temperature drift 4 12 ppm/°C TA = -40°C to +105°C 3
Drive current sink and source -10 10 mA Limit the reference output current to ±10mA 3
Turn-on settling time 1 s ±0.001% settling 3
Long-term stability 70 ppm/1000hr 0 to 1000 hours 3
Thermal hysteresis 30 ppm 3
Common-mode rejection 100 120 dB 60Hz, ac 3
AVDD, AVSS power-supply rejection 85 95 dB 60Hz, ac 3
DVDD power-supply rejection 85 110 dB 60Hz, ac 3
Data rate (fDATA) fDATA 10 14400 SPS 3
Internal oscillator accuracy -2 2 % 4
Internal oscillator frequency range 2 7.3728 8 MHz 4
Crystal oscillator frequency range 0.1 7.3728 8 MHz 4
External clock duty cycle 40 60 % 4
Input hysteresis 0.1 V 4
Input leakage -10 10 μA 0 < VDIGITAL INPUT < DVDD 4
AVSS AVSS -2.6 0 V 4
DVDD DVDD 2.7 5.25 V 4
Operating current, AVDD/AVSS 2.3 3.8 mA reference enabled 4
Operating current, DVDD 500 700 μA 4
Sleep mode current, DVDD 160 300 μA 4
Power-Down mode current, DVDD 1 10 μA 4
Operating power dissipation 13 22 mW 4
Power-Down mode power dissipation 10 240 μW 4
Specified temperature range -40 105 °C 4
Operating temperature range -40 125 °C 4
Storage temperature range -60 150 °C 4
SCLK pulse width: high tSPWH 90 ns 6
SCLK pulse width: low tSPWL 90 ns 6
CS low to first SCLK: setup time tCSSC 50 ns 6
Valid DIN to SCLK falling edge: setup time tDIST 35 ns 6
Valid DIN to SCLK falling edge: hold time tDIHD 20 ns 6
SCLK rising edge to valid new DOUT: propagation delay tDOPD 60 ns 6
SCLK rising edge to DOUT invalid: hold time tDOHD 0 ns 6
CS low to DOUT driven: propagation delay tCSDOD 0 40 ns 6

CAD (KiCad official)

  • Symbol: ADS1259BIPWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: ads1259bipwr-etched.step / ads1259bipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1259bipwr.step / ads1259bipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 92901308b988fecf, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF