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Contents

README

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ADS1256IDBT

Texas Instruments · Analog To Digital Converters (ADC) · SSOP-28-208mil

ADS1256IDBT from Texas Instruments, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AVDD power_in Analog power supply, 4.75 to 5.25V operating range.
2 AGND power_in Analog ground.
3 VREFN input Negative reference input; voltage range -0.1V to AVDD+0.1V.
4 VREFP input Positive reference input; voltage range -0.1V to AVDD+0.1V.
5 AINCOM input Analog input common reference; voltage range -0.1V to AVDD+0.1V.
6 AIN0 input Differential or single-ended analog input 0; voltage range -0.1V to AVDD+0.1V.
7 AIN1 input Differential or single-ended analog input 1; voltage range -0.1V to AVDD+0.1V.
8 AIN2 input Differential or single-ended analog input 2; voltage range -0.1V to AVDD+0.1V.
9 AIN3 input Differential or single-ended analog input 3; voltage range -0.1V to AVDD+0.1V.
10 AIN4 input Differential or single-ended analog input 4; voltage range -0.1V to AVDD+0.1V.
11 AIN5 input Differential or single-ended analog input 5; voltage range -0.1V to AVDD+0.1V.
12 AIN6 input Differential or single-ended analog input 6; voltage range -0.1V to AVDD+0.1V.
13 AIN7 input Differential or single-ended analog input 7; voltage range -0.1V to AVDD+0.1V.
14 SYNC/PDWN input Active-low synchronization or power-down input; Schmitt-trigger, 5V tolerant, minimum pulse width 4 τCLKIN.
15 RESET input Active-low reset input; Schmitt-trigger, 5V tolerant, minimum pulse width 4 τCLKIN.
16 DVDD power_in Digital power supply, 1.8 to 3.6V operating range.
17 DGND power_in Digital ground.
18 XTAL2 passive Crystal oscillator connection; leave floating when using external clock on XTAL1/CLKIN.
19 XTAL1/CLKIN input Crystal oscillator connection or external clock input (0.1 to 10MHz); 5V tolerant.
20 CS input Active-low chip select input; Schmitt-trigger, 5V tolerant, can be permanently tied low.
21 DRDY output Active-low data ready output; indicates when valid conversion data is ready.
22 DOUT tri_state Serial data output with high impedance when CS is high; output on rising SCLK edge.
23 DIN input Serial data input; Schmitt-trigger, 5V tolerant, shifted in on SCLK falling edge.
24 SCLK input Serial clock input; Schmitt-trigger, 5V tolerant, minimum pulse width 200ns high and low.
25 D0/CLKOUT bidirectional Digital I/O 0 or programmable clock output; configurable as input or output, default enabled as fCLKIN clock output.
26 D1 bidirectional Digital I/O 1; configurable as input or output through IO register.
27 D2 bidirectional Digital I/O 2; configurable as input or output through IO register.
28 D3 bidirectional Digital I/O 3; configurable as input or output through IO register.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-28-208mil
Category Data Acquisition
Pins 28

CAD (KiCad official)

  • Symbol: ADS1256IDBT
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
  • 3D model files: ads1256idbt-etched.step / ads1256idbt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1256idbt.step / ads1256idbt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 9da3323db162b593, retrieved 2026-09-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF