← Commit history

Initial commit: component/ads124s06ipbsr

Ray ·f02db1a374 ·4d ago
2 files changed +368
README.mdadded+69
@@ -0,0 +1,69 @@+# ADS124S06IPBSR++**Texas Instruments** · Analog To Digital Converters (ADC) · TQFP-32(5x5)++ADS124S06IPBSR from Texas Instruments, in a TQFP-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | AINCOM | input | Common analog input for single-ended measurements operating within AVSS - 0.3V to AVDD + 0.3V. |+| 2 | AIN5 | input | Analog input 5 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V. |+| 3 | AIN4 | input | Analog input 4 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V. |+| 4 | AIN3 | input | Analog input 3 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V. |+| 5 | AIN2 | input | Analog input 2 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V. |+| 6 | AIN1 | input | Analog input 1 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V. |+| 7 | AIN0 | input | Analog input 0 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V. |+| 8 | START/SYNC | input | Digital start conversion or synchronization input with logic levels from DGND - 0.3V to IOVDD + 0.3V. |+| 9 | CS | input | Active-low chip select enabling serial interface operation with logic levels from DGND - 0.3V to IOVDD + 0.3V. |+| 10 | DIN | input | Serial data input latched on SCLK falling edge with logic levels from DGND - 0.3V to IOVDD + 0.3V. |+| 11 | SCLK | input | Serial clock input for data synchronization with logic levels from DGND - 0.3V to IOVDD + 0.3V. |+| 12 | DOUT/DRDY | tri_state | Serial data output and data-ready indicator (active low) that tri-states (high-impedance) when CS is high. |+| 13 | DRDY | output | Data-ready output (active low) indicating when conversion data are ready for retrieval. |+| 14 | DGND | power_in | Digital ground for digital core and I/O circuits. |+| 15 | IOVDD | power_in | Digital I/O power supply (2.7V to 3.6V) requiring 100nF minimum bypass capacitor to DGND when not tied to DVDD. |+| 16 | DVDD | power_in | Digital core power supply (2.7V to 3.6V) requiring 100nF minimum bypass capacitor to DGND. |+| 17 | CLK | input | External clock input (DGND - 0.3V to IOVDD + 0.3V) that connects to DGND for internal oscillator operation. |+| 18 | RESET | input | Active-low reset input with logic levels from DGND - 0.3V to IOVDD + 0.3V. |+| 19 | GPIO3/AIN11 | bidirectional | Configurable general-purpose I/O using analog supply logic levels, with analog input 11 function not available on ADS124S06. |+| 20 | GPIO2/AIN10 | bidirectional | Configurable general-purpose I/O using analog supply logic levels, with analog input 10 function not available on ADS124S06. |+| 21 | GPIO1/AIN9 | bidirectional | Configurable general-purpose I/O using analog supply logic levels, with analog input 9 function not available on ADS124S06. |+| 22 | GPIO0/AIN8 | bidirectional | Configurable general-purpose I/O using analog supply logic levels, with analog input 8 function not available on ADS124S06. |+| 23 | REFOUT | output | Positive voltage reference output requiring 1µF to 47µF bypass capacitor to REFCOM when internal reference is enabled. |+| 24 | REFCOM | output | Negative voltage reference output that connects to AVSS. |+| 25 | NC | unconnected | No-connect pin that should be left unconnected or optionally connected to AVSS. |+| 26 | AVDD | power_in | Positive analog power supply (2.7V to 5.25V) requiring 330nF minimum bypass capacitor to AVSS. |+| 27 | AVSS | power_in | Negative analog power supply and ground reference for analog circuits. |+| 28 | AVSS-SW | power_in | Negative analog power supply low-side switch that connects to AVSS. |+| 29 | REFN0 | input | Negative external reference input 0 operating within AVSS - 0.3V to AVDD + 0.3V. |+| 30 | REFP0 | input | Positive external reference input 0 operating within AVSS - 0.3V to AVDD + 0.3V. |+| 31 | REFN1/AIN7 | input | Negative external reference input 1 (AVSS - 0.3V to AVDD + 0.3V) with analog input 7 function not available on ADS124S06. |+| 32 | REFP1/AIN6 | input | Positive external reference input 1 (AVSS - 0.3V to AVDD + 0.3V) with analog input 6 function not available on ADS124S06. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TQFP-32(5x5) |+| Category | Data Acquisition |+| Pins | 32 |++## CAD (KiCad official)++- Symbol: `ADS124S06IPBSR`+- Footprint: `Package_QFP:TQFP-32_5x5mm_P0.5mm`+- 3D model: TQFP-32(5x5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.1 mm nominal TQFP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `ads124s06ipbsr-etched.step` / `ads124s06ipbsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads124s06ipbsr.step` / `ads124s06ipbsr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads124s06) (115 pp, sha256 `62eb7595c22ca2ef`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads124s06ipbsr-datasheet.pdf)
page.jsonadded+299
@@ -0,0 +1,299 @@+{+  "slug": "ads124s06ipbsr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Analog To Digital Converters (ADC), TQFP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "ads124s06ipbsr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ads124s06ipbsr.kicad_sym",+    "ads124s06ipbsr.kicad_mod",+    "ads124s06ipbsr.glb",+    "ads124s06ipbsr.step",+    "ads124s06ipbsr.lbr",+    "docs/hero.png",+    "docs/ads124s06ipbsr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ADS124S06IPBSR",+    "manufacturer": "Texas Instruments",+    "package": "TQFP-32(5x5)",+    "pin_count": 32,+    "category": "Data Acquisition",+    "subcategory": "Analog To Digital Converters (ADC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/ads124s06",+    "parts": {+      "symbol": "ads124s06ipbsr.kicad_sym",+      "footprint": "ads124s06ipbsr.kicad_mod",+      "model_3d": "ads124s06ipbsr-etched.glb",+      "model_3d_plain": "ads124s06ipbsr.glb",+      "model_3d_step": "ads124s06ipbsr-etched.step",+      "model_3d_step_plain": "ads124s06ipbsr.step",+      "lbr": "ads124s06ipbsr.lbr"+    },+    "distributor_links": {+      "lcsc": "C701627",+      "digikey": "296-45169-2-ND",+      "mouser": "595-ADS124S06IPBSR"+    },+    "distributor_check": {+      "checked_at": "2026-10-01T18:20:24Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-45169-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-ADS124S06IPBSR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "AINCOM",+        "type": "input",+        "description": "Common analog input for single-ended measurements operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "2",+        "name": "AIN5",+        "type": "input",+        "description": "Analog input 5 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "3",+        "name": "AIN4",+        "type": "input",+        "description": "Analog input 4 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "4",+        "name": "AIN3",+        "type": "input",+        "description": "Analog input 3 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "5",+        "name": "AIN2",+        "type": "input",+        "description": "Analog input 2 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "6",+        "name": "AIN1",+        "type": "input",+        "description": "Analog input 1 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "7",+        "name": "AIN0",+        "type": "input",+        "description": "Analog input 0 for multiplexed conversion operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "8",+        "name": "START/SYNC",+        "type": "input",+        "description": "Digital start conversion or synchronization input with logic levels from DGND - 0.3V to IOVDD + 0.3V."+      },+      {+        "number": "9",+        "name": "CS",+        "type": "input",+        "description": "Active-low chip select enabling serial interface operation with logic levels from DGND - 0.3V to IOVDD + 0.3V."+      },+      {+        "number": "10",+        "name": "DIN",+        "type": "input",+        "description": "Serial data input latched on SCLK falling edge with logic levels from DGND - 0.3V to IOVDD + 0.3V."+      },+      {+        "number": "11",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input for data synchronization with logic levels from DGND - 0.3V to IOVDD + 0.3V."+      },+      {+        "number": "12",+        "name": "DOUT/DRDY",+        "type": "tri_state",+        "description": "Serial data output and data-ready indicator (active low) that tri-states (high-impedance) when CS is high."+      },+      {+        "number": "13",+        "name": "DRDY",+        "type": "output",+        "description": "Data-ready output (active low) indicating when conversion data are ready for retrieval."+      },+      {+        "number": "14",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital ground for digital core and I/O circuits."+      },+      {+        "number": "15",+        "name": "IOVDD",+        "type": "power_in",+        "description": "Digital I/O power supply (2.7V to 3.6V) requiring 100nF minimum bypass capacitor to DGND when not tied to DVDD."+      },+      {+        "number": "16",+        "name": "DVDD",+        "type": "power_in",+        "description": "Digital core power supply (2.7V to 3.6V) requiring 100nF minimum bypass capacitor to DGND."+      },+      {+        "number": "17",+        "name": "CLK",+        "type": "input",+        "description": "External clock input (DGND - 0.3V to IOVDD + 0.3V) that connects to DGND for internal oscillator operation."+      },+      {+        "number": "18",+        "name": "RESET",+        "type": "input",+        "description": "Active-low reset input with logic levels from DGND - 0.3V to IOVDD + 0.3V."+      },+      {+        "number": "19",+        "name": "GPIO3/AIN11",+        "type": "bidirectional",+        "description": "Configurable general-purpose I/O using analog supply logic levels, with analog input 11 function not available on ADS124S06."+      },+      {+        "number": "20",+        "name": "GPIO2/AIN10",+        "type": "bidirectional",+        "description": "Configurable general-purpose I/O using analog supply logic levels, with analog input 10 function not available on ADS124S06."+      },+      {+        "number": "21",+        "name": "GPIO1/AIN9",+        "type": "bidirectional",+        "description": "Configurable general-purpose I/O using analog supply logic levels, with analog input 9 function not available on ADS124S06."+      },+      {+        "number": "22",+        "name": "GPIO0/AIN8",+        "type": "bidirectional",+        "description": "Configurable general-purpose I/O using analog supply logic levels, with analog input 8 function not available on ADS124S06."+      },+      {+        "number": "23",+        "name": "REFOUT",+        "type": "output",+        "description": "Positive voltage reference output requiring 1µF to 47µF bypass capacitor to REFCOM when internal reference is enabled."+      },+      {+        "number": "24",+        "name": "REFCOM",+        "type": "output",+        "description": "Negative voltage reference output that connects to AVSS."+      },+      {+        "number": "25",+        "name": "NC",+        "type": "unconnected",+        "description": "No-connect pin that should be left unconnected or optionally connected to AVSS."+      },+      {+        "number": "26",+        "name": "AVDD",+        "type": "power_in",+        "description": "Positive analog power supply (2.7V to 5.25V) requiring 330nF minimum bypass capacitor to AVSS."+      },+      {+        "number": "27",+        "name": "AVSS",+        "type": "power_in",+        "description": "Negative analog power supply and ground reference for analog circuits."+      },+      {+        "number": "28",+        "name": "AVSS-SW",+        "type": "power_in",+        "description": "Negative analog power supply low-side switch that connects to AVSS."+      },+      {+        "number": "29",+        "name": "REFN0",+        "type": "input",+        "description": "Negative external reference input 0 operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "30",+        "name": "REFP0",+        "type": "input",+        "description": "Positive external reference input 0 operating within AVSS - 0.3V to AVDD + 0.3V."+      },+      {+        "number": "31",+        "name": "REFN1/AIN7",+        "type": "input",+        "description": "Negative external reference input 1 (AVSS - 0.3V to AVDD + 0.3V) with analog input 7 function not available on ADS124S06."+      },+      {+        "number": "32",+        "name": "REFP1/AIN6",+        "type": "input",+        "description": "Positive external reference input 1 (AVSS - 0.3V to AVDD + 0.3V) with analog input 6 function not available on ADS124S06."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 21,+        "cost_usd": 0.2178,+        "at": "2026-10-01T18:20:10"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/ads124s06",+        "pages": 115,+        "sha256": "62eb7595c22ca2ef",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 32,+        "described": 32,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file