component
ADS1235QWRHMRQ1
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| ads1235qwrhmrq1-etched.glb | 13d ago |
| ads1235qwrhmrq1-etched.step | 13d ago |
| ads1235qwrhmrq1-hero.glb | 13d ago |
| ads1235qwrhmrq1-hero.overlay.json | 13d ago |
| ads1235qwrhmrq1.glb | 13d ago |
| ads1235qwrhmrq1.kicad_mod | 13d ago |
| ads1235qwrhmrq1.kicad_sym | 13d ago |
| ads1235qwrhmrq1.lbr | 13d ago |
| ads1235qwrhmrq1.step | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
ADS1235QWRHMRQ1
Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-32-EP(5x5)
ADS1235QWRHMRQ1 from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection; float or connect to AVSS. |
| 2 | CAPP | output | PGA output P; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN. |
| 3 | CAPN | output | PGA output N; connect a 4.7-nF C0G dielectric capacitor across CAPP and CAPN. |
| 4 | AVDD | power_in | Positive analog power supply. |
| 5 | AVSS | power_in | Negative analog power supply. |
| 6 | NC | unconnected | No connection; solder the pin for mechanical support, float or connect to DGND. |
| 7 | PWDN | input | Power down, active low. |
| 8 | RESET | input | Reset, active low. |
| 9 | START | input | Start conversion control, active high. |
| 10 | CS | input | Serial interface chip select, active low. |
| 11 | SCLK | input | Serial interface shift clock. |
| 12 | DIN | input | Serial interface data input. |
| 13 | DRDY | output | Data ready indicator, active low. |
| 14 | DOUT/DRDY | output | Dual-function serial interface data output and active-low data ready indicator. |
| 15 | BYPASS | output | Internal subregulator bypass; connect a 1-µF capacitor to DGND. |
| 16 | DGND | power_in | Digital ground. |
| 17 | DVDD | power_in | Digital power supply. |
| 18 | CLKIN | input | Internal oscillator: connect to DGND; external clock: connect clock input. |
| 19 | NC | unconnected | No connection; solder the pin for mechanical support, float or connect to DGND. |
| 20 | NC | unconnected | No connection; solder the pin for mechanical support, float or connect to DGND. |
| 21 | NC | unconnected | No connection; solder the pin for mechanical support, float or connect to DGND. |
| 22 | NC | unconnected | No connection; solder the pin for mechanical support, float or connect to DGND. |
| 23 | NC | unconnected | No connection; solder the pin for mechanical support, float or connect to DGND. |
| 24 | NC | unconnected | No connection; solder the pin for mechanical support, float or connect to DGND. |
| 25 | AIN5 | input | Analog input 5. |
| 26 | AIN4 | input | Analog input 4. |
| 27 | AIN3 | bidirectional | Analog input 3, also GPIO3 and ACX2. |
| 28 | AIN2 | bidirectional | Analog input 2, also GPIO2 and ACX1. |
| 29 | AIN1 | bidirectional | Analog input 1, also GPIO1, ACX2 and reference input 1 negative. |
| 30 | AIN0 | bidirectional | Analog input 0, also GPIO0, ACX1 and reference input 1 positive. |
| 31 | REFN0 | bidirectional | Reference input 0 negative. |
| 32 | REFP0 | bidirectional | Reference input 0 positive. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | ADC/DAC/Data Conversion |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage AVDD to AVSS | -0.3 | 7 | V | 4 | |||
| AVSS to DGND | -3 | 0.3 | V | 4 | |||
| DVDD to DGND | -0.3 | 7 | V | 4 | |||
| Input current | -10 | 10 | mA | Continuous, all pins except power-supply pins | 4 | ||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -60 | 150 | °C | 4 | ||
| Analog power supply AVDD to AVSS | 4.75 | 5 | 5.25 | V | 5 | ||
| AVSS to DGND | -2.6 | 0 | V | 5 | |||
| Digital power supply DVDD to DGND | 2.7 | 5.25 | V | 5 | |||
| Differential reference voltage | VREF | 0.9 | V | VREF = V(REFPx), V(REFNx) | 5 | ||
| External clock frequency | fCLK | 1 | 7.3728 | 8 | MHz | 5 | |
| Duty cycle | 40 | 60 | % | 5 | |||
| Operating ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Absolute input current | 4 | 12 | nA | PGA mode, V(AINx) = 2.5 V | 6 | ||
| Differential input current | -8 | 1 | 8 | nA | PGA mode, VIN = 2.5 V | 6 | |
| Data rate | DR | 2.5 | 7200 | SPS | 6 | ||
| Integral non-linearity | INL | -10 | 2 | 10 | ppmFSR | Gain = 1, 64 and 128 | 6 |
| Offset voltage | VOS | -355 | 50 | 355 | µV | TA = 25°C, gain = 1 | 6 |
| Offset voltage | VOS | -10 | 1.5 | 10 | µV | TA = 25°C, gain = 64 and 128 | 6 |
| Offset voltage | VOS | -0.6 | 0.2 | 0.6 | µV | TA = 25°C, gain = 1, chop mode | 6 |
| Offset voltage | VOS | -0.06 | 0.005 | 0.06 | µV | TA = 25°C, gain = 64 and 128, chop mode | 6 |
| Offset voltage drift | 150 | 350 | nV/°C | Gain = 1 | 6 | ||
| Offset voltage drift | 15 | 75 | nV/°C | Gain = 64 and 128 | 6 | ||
| Offset voltage drift | 1 | 5 | nV/°C | Gain = 1, 64, and 128, chop mode | 6 | ||
| Gain error | GE | -0.6 | 0.05 | 0.6 | % | TA = 25°C | 6 |
| Gain drift | 0.5 | 4 | ppm/°C | 6 | |||
| Common-mode rejection ratio | CMRR | 105 | 115 | dB | Data rate = 400 SPS | 6 | |
| Power-supply rejection ratio, AVDD and AVSS | PSRR | 85 | 100 | dB | AVDD and AVSS | 6 | |
| Power-supply rejection ratio, DVDD | PSRR | 95 | 120 | dB | DVDD | 6 | |
| Internal oscillator accuracy | -2 | 0.5 | 2 | % | 6 | ||
| Low voltage monitor threshold low | 0.4 | 0.6 | V | 7 | |||
| Input leakage | -10 | 10 | µA | VIH or VIL | 7 | ||
| Analog supply current | IAVDD, IAVSS | 2.7 | 4.5 | mA | PGA bypass | 7 | |
| Analog supply current | IAVDD, IAVSS | 4.3 | 6.5 | mA | PGA mode, gain = 64 and 128 | 7 | |
| Analog supply current in power-down mode | IAVDD, IAVSS | 2 | 8 | µA | Power-down mode | 7 | |
| Digital supply current | IDVDD | 0.4 | 0.7 | mA | 7 | ||
| Digital supply current in power-down mode | IDVDD | 30 | 75 | µA | Power-down mode; CLKIN input stopped | 7 | |
| Power dissipation | PD | 23 | 35 | mW | PGA mode, gain = 64 and 128 | 7 | |
| Power dissipation in power-down mode | PD | 0.1 | 0.3 | mW | Power-down mode | 7 | |
| SCLK period | tc(SC) | 97 | 106 | ns | DVDD = 2.7 V to 5.25 V; DOUT/DRDY load 20 pF // 100 kΩ to DGND | 8 | |
| Propagation delay, CS falling edge to DOUT/DRDY driven | tp(CSDO) | 0 | 50 | ns | DVDD = 2.7 V to 5.25 V; DOUT/DRDY load 20 pF // 100 kΩ to DGND | 9 | |
| Propagation delay, power-on threshold voltage to ADC communication | tp(PRCM) | 2 | 16 | 1/fCLK | DVDD = 2.7 V to 5.25 V; DOUT/DRDY load 20 pF // 100 kΩ to DGND | 9 | |
| Junction-to-ambient thermal resistance | RθJA | 29.2 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 17.6 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 9.8 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 1.1 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
ADS1235QWRHMRQ1 - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
ads1235qwrhmrq1-etched.step/ads1235qwrhmrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads1235qwrhmrq1.step/ads1235qwrhmrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (75 pp, sha256
d9217352d32d5a09, retrieved 2026-10-20, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).