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Contents

README

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ADS1232IPWR

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-24

ADS1232IPWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVDD power_in Digital power supply; connect to 2.7V to 5.3V
2 DGND power_in Digital ground reference
3 CLKIN/XTAL1 input External clock input or crystal oscillator pin 1; tie low to activate internal oscillator
4 XTAL2 passive Crystal oscillator pin 2; leave disconnected if using external clock or internal oscillator
5 DGND power_in Digital ground reference
6 DGND power_in Digital ground reference
7 TEMP input Temperature sensor select input; high selects internal temperature sensor, low selects analog input channels
8 A0 input Analog input channel select pin; used with TEMP to multiplex between analog inputs
9 CAP passive PGA bypass capacitor pin 1; connect 0.1µF capacitor to pin 10 to create 720Hz low-pass filter
10 CAP passive PGA bypass capacitor pin 2; connect 0.1µF capacitor to pin 9 to create 720Hz low-pass filter
11 AINP1 input Positive differential input for channel 1
12 AINN1 input Negative differential input for channel 1
13 AINN2 input Negative differential input for channel 2
14 AINP2 input Positive differential input for channel 2
15 REFN input Negative voltage reference input; range AGND - 0.1V to (REFP - 1.5V)
16 REFP input Positive voltage reference input; range (REFN + 1.5V) to (AVDD + 0.1V)
17 AGND power_in Analog ground reference
18 AVDD power_in Analog power supply; connect to 2.7V to 5.3V
19 GAIN0 input Gain select input bit 0 (LSB); used with GAIN1 to set gain of 1, 2, 64, or 128
20 GAIN1 input Gain select input bit 1 (MSB); used with GAIN0 to set gain of 1, 2, 64, or 128
21 SPEED input Data rate select input; low selects 10SPS with 50/60Hz rejection, high selects 80SPS
22 PDWN input Power-down control input; hold low to power down and reset ADC; toggle high then low at startup
23 SCLK input Serial clock input; data shifted out on rising edges with rise/fall times less than 50ns required
24 DRDY/DOUT output Dual-function digital output; goes low when data ready, then outputs 24-bit result MSB first on SCLK rising edges

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Data Acquisition
Pins 24

CAD (KiCad official)

  • Symbol: ADS1232IPWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: ads1232ipwr-etched.step / ads1232ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1232ipwr.step / ads1232ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 00f92c6871a8b92a, retrieved 2026-09-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF