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ADS1218Y

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Texas Instruments Analog To Digital Converters (ADC), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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ADS1218Y

Texas Instruments · Analog To Digital Converters (ADC) · TQFP-48(7x7)

ADS1218Y from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AVDD power_in Analog power supply input; supports 4.75V to 5.25V per electrical characteristics.
2 AGND power_in Analog ground reference.
3 AIN0 input Analog input channel 0; accepts differential or single-ended measurements multiplexed with other channels.
4 AIN1 input Analog input channel 1; accepts differential or single-ended measurements multiplexed with other channels.
5 AIN2 input Analog input channel 2; accepts differential or single-ended measurements multiplexed with other channels.
6 AIN3 input Analog input channel 3; accepts differential or single-ended measurements multiplexed with other channels.
7 AIN4 input Analog input channel 4; accepts differential or single-ended measurements multiplexed with other channels.
8 AIN5 input Analog input channel 5; accepts differential or single-ended measurements multiplexed with other channels.
9 AIN6 input Analog input channel 6; accepts differential or single-ended measurements multiplexed with other channels.
10 AIN7 input Analog input channel 7; accepts differential or single-ended measurements multiplexed with other channels.
11 AINCOM input Analog input common; serves as negative input reference for differential channel measurements or can be selected as positive/negative input.
12 AGND power_in Analog ground reference.
13 AVDD power_in Analog power supply input; supports 4.75V to 5.25V per electrical characteristics.
14 VRCAP passive Bypass capacitor connection for internal reference; requires 1000pF ceramic capacitor to AGND when using internal reference.
15 IDAC1 output Current DAC1 output; delivers 0.5mA to 20mA based on range selection and 8-bit code.
16 IDAC2 output Current DAC2 output; delivers 0.5mA to 20mA based on range selection and 8-bit code.
17 RDAC passive External resistor connection for setting IDAC full-scale range; typical values 10kΩ to 150kΩ to AGND.
18 WREN input Flash write enable input; active high; must be high with WREN register bit set to enable Flash write operations.
19 DGND power_in Digital ground reference.
20 DGND power_in Digital ground reference.
21 DGND power_in Digital ground reference.
22 DGND power_in Digital ground reference.
23 BUFEN input Buffer enable input; high enables input buffer when ANDed with BUFFER bit in ACR register.
24 RESET input Active low reset input; forces device to reset and copy Flash page 0 contents to configuration registers.
25 XIN input Clock input; accepts 1MHz to 5MHz external clock or crystal oscillator signal.
26 XOUT output Clock output; provides clock signal for crystal or resonator connection with external load capacitors.
27 PDWN input Active low power-down input; when low, disables analog and digital circuits for low-power operation.
28 POL input Serial clock polarity control; high selects active-high SCLK, low selects active-low SCLK.
29 DSYNC input Active low synchronization input; resets filter counter on falling edge and holds modulator in reset until rising edge.
30 DGND power_in Digital ground reference.
31 DVDD power_in Digital power supply input; supports 2.7V to 5.25V.
32 DRDY output Active low data-ready output; goes low when new conversion result is available in output register.
33 CS input Active low chip select input; must be low for serial SPI communication to be enabled.
34 SCLK input Serial clock input with Schmitt trigger; clocks data transfer on DIN and DOUT at rates up to 5MHz.
35 DIN input Serial data input with Schmitt trigger; receives commands and configuration data synchronized to SCLK.
36 DOUT tri_state Serial data output; outputs conversion results and configuration register data; goes tri-state when CS is high.
37 D0 bidirectional Digital I/O pin 0; configurable as input or output via DIR and DIO configuration registers.
38 D1 bidirectional Digital I/O pin 1; configurable as input or output via DIR and DIO configuration registers.
39 D2 bidirectional Digital I/O pin 2; configurable as input or output via DIR and DIO configuration registers.
40 D3 bidirectional Digital I/O pin 3; configurable as input or output via DIR and DIO configuration registers.
41 D4 bidirectional Digital I/O pin 4; configurable as input or output via DIR and DIO configuration registers.
42 D5 bidirectional Digital I/O pin 5; configurable as input or output via DIR and DIO configuration registers.
43 D6 bidirectional Digital I/O pin 6; configurable as input or output via DIR and DIO configuration registers.
44 D7 bidirectional Digital I/O pin 7; configurable as input or output via DIR and DIO configuration registers.
45 AGND power_in Analog ground reference.
46 VREFOUT output Voltage reference output; supplies external loads and IDAC; outputs 1.25V or 2.5V based on REF HI register bit.
47 VREF+ power_in Positive differential reference input; accepts 0V to AVDD; differential voltage VREF ≡ VREF+ - VREF-.
48 VREF- power_in Negative differential reference input; accepts 0V to AVDD; differential voltage VREF ≡ VREF+ - VREF-.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-48(7x7)
Category Data Acquisition
Pins 48

CAD (KiCad official)

  • Symbol: ADS1218Y
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: ads1218y-etched.step / ads1218y-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1218y.step / ads1218y.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 86b58104a8d8a531, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF