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ADS1216Y

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Texas Instruments Analog To Digital Converters (ADCs), TQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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ADS1216Y

Texas Instruments · Analog To Digital Converters (ADCs) · TQFP-48(7x7)

ADS1216Y from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AVDD power_in Analog power supply (4.75V to 5.25V or 2.7V to 3.3V).
2 AGND power_in Analog ground reference.
3 AIN0 input Analog input 0, supports ±2.5V differential full-scale range with unity gain.
4 AIN1 input Analog input 1, supports ±2.5V differential full-scale range with unity gain.
5 AIN2 input Analog input 2, supports ±2.5V differential full-scale range with unity gain.
6 AIN3 input Analog input 3, supports ±2.5V differential full-scale range with unity gain.
7 AIN4 input Analog input 4, supports ±2.5V differential full-scale range with unity gain.
8 AIN5 input Analog input 5, supports ±2.5V differential full-scale range with unity gain.
9 AIN6 input Analog input 6, supports ±2.5V differential full-scale range with unity gain.
10 AIN7 input Analog input 7, supports ±2.5V differential full-scale range with unity gain.
11 AINCOM input Analog input common mode reference for multiplexed input selection.
12 AGND power_in Analog ground reference.
13 AVDD power_in Analog power supply (4.75V to 5.25V or 2.7V to 3.3V).
14 VRCAP passive Voltage reference bypass capacitor, connect 0.1µF capacitor to AGND for noise filtering.
15 IDAC1 output Current DAC1 output, full-scale range 0.5mA to 20mA depending on RDAC and configuration.
16 IDAC2 output Current DAC2 output, full-scale range 0.5mA to 20mA depending on RDAC and configuration.
17 RDAC passive External resistor connection for DAC current setting, typical range 10kΩ to 150kΩ.
18 DGND power_in Digital ground reference.
19 DGND power_in Digital ground reference.
20 DGND power_in Digital ground reference.
21 DGND power_in Digital ground reference.
22 DGND power_in Digital ground reference.
23 BUFEN input Buffer enable input, logic HIGH enables input buffer for high impedance analog measurements.
24 RESET input Active LOW asynchronous reset, resets all registers to default power-up values.
25 XIN input Clock input, 1MHz to 5MHz oscillator or crystal input.
26 XOUT output Clock output for external crystal network feedback.
27 PDWN input Active LOW power down control, shuts down analog and digital circuits.
28 POL input Serial clock polarity select, HIGH for rising-edge sensitive SCLK, LOW for falling-edge.
29 DSYNC input Active LOW synchronization control, resets digital filter counter on falling edge.
30 DGND power_in Digital ground reference.
31 DVDD power_in Digital power supply (2.7V to 5.25V).
32 DRDY output Active LOW data ready output, indicates valid conversion data available for reading.
33 CS input Active LOW chip select for SPI serial interface.
34 SCLK input Serial clock input for SPI with Schmitt trigger, 1MHz to 5MHz clock rate.
35 DIN input Serial data input for SPI with Schmitt trigger, most significant bit shifted first.
36 DOUT tri_state Serial data output for SPI, tri-states HIGH when CS is HIGH, most significant byte first.
37 D0 bidirectional Digital I/O 0, configurable as input or output via DIR register, default as input.
38 D1 bidirectional Digital I/O 1, configurable as input or output via DIR register, default as input.
39 D2 bidirectional Digital I/O 2, configurable as input or output via DIR register, default as input.
40 D3 bidirectional Digital I/O 3, configurable as input or output via DIR register, default as input.
41 D4 bidirectional Digital I/O 4, configurable as input or output via DIR register, default as input.
42 D5 bidirectional Digital I/O 5, configurable as input or output via DIR register, default as input.
43 D6 bidirectional Digital I/O 6, configurable as input or output via DIR register, default as input.
44 D7 bidirectional Digital I/O 7, configurable as input or output via DIR register, default as input.
45 AGND power_in Analog ground reference.
46 VREFOUT output Voltage reference output, 1.25V or 2.5V selectable, source capability up to 100µA.
47 VREF+ power_in Positive differential reference input, differential with VREF-, range 0V to AVDD.
48 VREF- power_in Negative differential reference input, differential with VREF+, range 0V to AVDD.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-48(7x7)
Category Analog ICs
Pins 48

CAD (KiCad official)

  • Symbol: ADS1216Y
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: ads1216y-etched.step / ads1216y-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1216y.step / ads1216y.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 9471cf428c1dab20, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF