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ADS1204IRHBR

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Texas Instruments Analog To Digital Converters (ADCs), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionads1204irhbrfactory-2.0.0extractor-text

Verified ADS1204IRHBR

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADS1204IRHBR · VQFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 34-page datasheet
  • ✓distributor: lcsc C2667253, digikey 296-42163-2-ND, mouser 595-ADS1204IRHBR
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-jelfbs9j/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.31)
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ads1204irhbr.kicad_sym✓ ads1204irhbr.kicad_mod✓ ads1204irhbr.step
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3D Model

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Symbol & Footprint

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Contents

README

markdown

ADS1204IRHBR

Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-32-EP(5x5)

ADS1204IRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CH A+ input Noninverting analog input of channel A.
2 CH A- input Inverting analog input of channel A.
3 CH B+ input Noninverting analog input of channel B.
4 CH B- input Inverting analog input of channel B.
5 CH C- input Inverting analog input of channel C.
6 CH C+ input Noninverting analog input of channel C.
7 CH D- input Inverting analog input of channel D.
8 CH D+ input Noninverting analog input of channel D.
9 REFIN D input Reference voltage input of channel D, pin for external reference voltage.
10 REFIN C input Reference voltage input of channel C, pin for external reference voltage.
11 AGND power_in Analog ground.
12 AVDD power_in Analog power supply, nominal 5 V.
13 NC unconnected No connection; this pin is left unconnected.
14 AVDD power_in Analog power supply, nominal 5 V.
15 AGND power_in Analog ground.
16 CLKSEL input Clock select between internal clock (CLKSEL = 1) or external clock (CLKSEL = 0).
17 CLKIN input External clock input.
18 BVDD power_in Digital interface power supply, from 2.7 V to 5.5 V.
19 BGND power_in Interface ground.
20 CLKOUT output System clock output.
21 OUT D output Bit stream from channel D modulator.
22 OUT C output Bit stream from channel C modulator.
23 OUT B output Bit stream from channel B modulator.
24 OUT A output Bit stream from channel A modulator.
25 NC unconnected No connection; this pin is left unconnected.
26 AGND power_in Analog ground.
27 AVDD power_in Analog power supply, nominal 5 V.
28 REFOUT output Reference voltage output of the internal reference source, nominal 2.5 V.
29 AVDD power_in Analog power supply, nominal 5 V.
30 AGND power_in Analog ground.
31 REFIN B input Reference voltage input of channel B, pin for external reference voltage.
32 REFIN A input Reference voltage input of channel A, pin for external reference voltage.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32-EP(5x5)
Category ADC/DAC/Data Conversion
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog supply voltage AVDD to AGND AVDD -0.3 6 V 5
Supply voltage BVDD to BGND BVDD -0.3 6 V 5
Ground voltage difference, AGND to BGND -0.3 0.3 V 5
Voltage differences, BVDD to AGND -0.3 6 V 5
Input current to any pin except supply -10 10 mA 5
Operating virtual junction temperature TJ -40 150 °C 5
Storage temperature Tstg -65 150 °C 5
ESD HBM V(ESD) -2000 2000 V Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 5
ESD CDM V(ESD) -750 750 V Charged-device model (CDM), per JEDEC specification JESD22-C101 5
Supply voltage, AVDD to AGND AVDD 4.75 5 5.25 V 6
Supply voltage, BVDD to BGND, low-voltage levels BVDD 2.7 3.6 V Low-voltage levels 6
Supply voltage, BVDD to BGND, 5V logic levels BVDD 4.5 5 5.5 V 5V logic levels 6
Reference input voltage 0.5 2.5 2.6 V 6
Operating common-mode signal 0 V Max printed as AVDD 6
External clock 16 20 32 MHz 6
Operating free-air temperature range TA -40 125 °C 6
Specified free-air temperature range TA -40 105 °C 6
Junction-to-ambient thermal resistance RθJA 28.6 °C/W RHB (VQFN) 32 pins 6
Junction-to-case (top) thermal resistance RθJC(top) 17 °C/W RHB (VQFN) 32 pins 6
Junction-to-board thermal resistance RθJB 9.7 °C/W RHB (VQFN) 32 pins 6
Junction-to-case (bottom) thermal resistance RθJC(bot) 0.7 °C/W RHB (VQFN) 32 pins 6
Integral linearity error INL 1 3 LSB CH x+ = -2 V to +2 V at 2.5 V 6
Integral linearity error INL 0.001 0.005 % FSR CH x+ = -2 V to +2 V at 2.5 V 6
Integral linearity match 6 LSB 6
Integral linearity match 0.009 % FSR 6
Differential nonlinearity DNL 1 LSB 6
Input offset error VOS -1.4 3 mV 6
Input offset error match 2 mV 6
Input offset error drift TCVOS 2 8 µV/°C 6
Gain error GERR 0.08 0.5 % FSR Referenced to VREF 6
Gain error match 0.185 0.5 % FSR 6
Gain error drift TCGERR 2 ppm/°C 6
Power-supply rejection ratio PSRR 78 dB 4.75 V < AVDD < 5.25 V 6
Internal clock frequency 8 10 12 MHz CLKSEL = 1 7
External clock frequency CLKIN 1 20 32 MHz CLKSEL = 0 7
Total harmonic distortion THD -96 -88 dB VIN = ±2 VPP at 5 kHz; -40°C ≤ TA ≤ +85°C 7
Total harmonic distortion THD -96 -87 dB VIN = ±2 VPP at 5 kHz; -40°C ≤ TA ≤ +105°C 7
Spurious-free dynamic range SFDR 92 100 dB VIN = ±2 VPP at 5 kHz 7
Signal-to-noise ratio SNR 86 89 dB VIN = ±2 VPP at 5 kHz 7
Signal-to-noise + distortion SINAD 85 89 dB VIN = ±2 VPP at 5 kHz 7
Effective number of bits ENOB 14 14.5 Bits 7
Reference voltage output VOUT 2.45 2.5 2.55 V 7
Output voltage temperature drift dVOUT/dT 20 ppm/°C 7
Reference voltage input VIN 0.5 2.5 2.6 V 7
Low-level input voltage (5V logic) VIL -0.3 V Digital inputs, 5.0-V nominal supply; max printed as 0.3 × BVDD 7
Input current (5V logic) IIN -50 50 nA VI = BVDD or GND 7
High-level output voltage (5V logic) VOH 4.44 V BVDD = 4.5 V, IOH = -100 µA 8
Low-level output voltage (5V logic) VOL 0.5 V BVDD = 4.5 V, IOL = 100 µA 8
High-level input voltage (3V logic) VIH 2 V BVDD = 3.6 V; max printed as BVDD + 0.3 8
Low-level input voltage (3V logic) VIL -0.3 0.8 V BVDD = 2.7 V 8
Input current (3V logic) IIN -50 50 nA VI = BVDD or GND 8
Low-level output voltage (3V logic) VOL 0.2 V BVDD = 2.7 V, IOL = 100 µA 8
Analog supply voltage AVDD 4.5 5.5 V 8
Buffer I/O supply voltage, low-voltage levels BVDD 2.7 3.6 V Low-voltage levels 8
Buffer I/O supply voltage, 5-V logic levels BVDD 4.5 5.5 V 5-V logic levels 8
Analog operating supply current AIDD 22.5 30 mA CLKSEL = 1 8
Analog operating supply current AIDD 22.4 29 mA CLKSEL = 0 8
Buffer I/O operating supply current BIDD 4 mA BVDD = 3 V, CLKOUT = 10 MHz 8
Power dissipation 122 145 mW CLKSEL = 0 8
Power dissipation 112.5 150 mW CLKSEL = 1 8
CLKIN period tC1 31.25 1000 ns BVDD = 5 V 9
CLKOUT period using internal oscillator tC2 83 125 ns CLKSEL = 1 9
CLKIN high time tW1 10 ns BVDD = 5 V; max printed as tC1 - 10 9

CAD (KiCad official)

  • Symbol: ADS1204IRHBR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: ads1204irhbr-etched.step / ads1204irhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1204irhbr.step / ads1204irhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 30e4b0ba22025397, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF