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ADS1192IRSMT

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Texas Instruments Analog Front End (AFE), VQFN-32(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADS1192IRSMT

Texas Instruments · Analog Front End (AFE) · VQFN-32(4x4)

ADS1192IRSMT from Texas Instruments, in a VQFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGA1N output Differential analog negative output of PGA channel 1.
2 PGA1P output Differential analog positive output of PGA channel 1.
3 IN1N input Differential analog negative input 1; the datasheet notes this excludes effects of noise, linearity, offset, and gain error, and the analog input range is AVSS - 0.3 V to AVDD + 0.3 V (absolute maximum).
4 IN1P input Differential analog positive input 1; the datasheet notes this excludes effects of noise, linearity, offset, and gain error, and the analog input range is AVSS - 0.3 V to AVDD + 0.3 V (absolute maximum).
5 IN2N input Differential analog negative input 2; the datasheet notes this excludes effects of noise, linearity, offset, and gain error, and the analog input range is AVSS - 0.3 V to AVDD + 0.3 V (absolute maximum).
6 IN2P input Differential analog positive input 2; the datasheet notes this excludes effects of noise, linearity, offset, and gain error, and the analog input range is AVSS - 0.3 V to AVDD + 0.3 V (absolute maximum).
7 PGA2N output Differential analog negative output of PGA channel 2.
8 PGA2P output Differential analog positive output of PGA channel 2.
9 VREFP bidirectional Positive reference voltage, analog input/output.
10 VREFN input Negative reference voltage, analog input.
11 VCAP1 passive Analog bypass capacitor connection.
12 AVDD power_in Analog supply; the datasheet specifies 2.7 V to 5.25 V and an absolute maximum of -0.3 V to +7 V from AVSS.
13 AVSS power_in Analog ground; the datasheet limits AVSS to DGND to -3 V to +0.2 V (absolute maximum).
14 CLKSEL input Master clock select digital input.
15 PWDN/RESET input Power-down / system reset digital input; active low.
16 START input Start conversion digital input.
17 CLK input Master clock digital input.
18 CS input Chip select digital input for the SPI interface.
19 DIN input SPI data input digital input.
20 SCLK input SPI clock digital input.
21 DOUT output SPI data output digital output.
22 DRDY output Data ready digital output; active low.
23 DVDD power_in Digital power supply; the datasheet specifies 1.7 V to 3.6 V and an absolute maximum of -0.3 V to +7 V from DGND.
24 DGND power_in Digital ground.
25 GPIO2/RCLK2 bidirectional General-purpose digital input/output 2, also RCLK2.
26 GPIO1/RCLK1 bidirectional General-purpose digital input/output 1, also RCLK1.
27 VCAP2 passive Analog bypass capacitor connection.
28 RLDINV input Right leg drive inverting input, analog input.
29 RLDIN/RLDREF input Right leg drive input to the MUX and RLD reference, analog input.
30 RLDOUT output Right leg drive output.
31 IN3P bidirectional Differential analog positive input 3, analog input/output.
32 IN3N bidirectional Differential analog negative input 3, analog input/output.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32(4x4)
Category Data Acquisition
Pins 33

CAD (KiCad official)

  • Symbol: ADS1192IRSMT
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: VQFN-32(4x4) (KiCad packages3D, STEP)
  • 3D model files: ads1192irsmt-etched.step / ads1192irsmt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1192irsmt.step / ads1192irsmt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (70 pp, sha256 7849445069dc8f6f, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF