component
ADS112C04IRTER
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS112C04IRTER
Texas Instruments · Analog To Digital Converters (ADC) · WQFN-16-EP(3x3)
ADS112C04IRTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | input | Active-low reset input with minimum pulse width tw(RSL) = 250 ns |
| 2 | DGND | power_in | Digital ground connection |
| 3 | AVSS | power_in | Analog negative supply and ground reference requiring 100 nF minimum bypass capacitor to AVDD |
| 4 | AIN3 | input | Analog input 3 with absolute input voltage range (AVSS − 0.1 V) to (AVDD + 0.1 V) when PGA disabled |
| 5 | AIN2 | input | Analog input 2 with absolute input voltage range (AVSS − 0.1 V) to (AVDD + 0.1 V) when PGA disabled |
| 6 | REFN | input | Negative reference input with differential reference voltage range 0.75 V to (AVDD − AVSS) |
| 7 | REFP | input | Positive reference input with differential reference voltage range 0.75 V to (AVDD − AVSS) |
| 8 | AIN1 | input | Analog input 1 with absolute input voltage range (AVSS − 0.1 V) to (AVDD + 0.1 V) when PGA disabled |
| 9 | AIN0 | input | Analog input 0 with absolute input voltage range (AVSS − 0.1 V) to (AVDD + 0.1 V) when PGA disabled |
| 10 | AVDD | power_in | Positive analog supply (2.3 V to 5.5 V) requiring 100 nF minimum bypass capacitor to AVSS |
| 11 | DVDD | power_in | Positive digital supply (2.3 V to 5.5 V) requiring 100 nF minimum bypass capacitor to DGND |
| 12 | DRDY | output | Data ready output open-drain active low with typical pulse width tw(DRH) = 2 tMOD; connect to DVDD using pullup resistor |
| 13 | SDA | bidirectional | I²C serial data open-drain line supporting standard/fast/fast-mode plus up to 1 Mbps; connect to DVDD using pullup resistor |
| 14 | SCL | input | I²C serial clock input supporting standard/fast/fast-mode plus up to 1 Mbps; connect to DVDD using pullup resistor |
| 15 | A0 | input | I²C slave address select pin 0; connect to DGND, DVDD, SDA, or SCL for 16-address configuration |
| 16 | A1 | input | I²C slave address select pin 1; connect to DGND, DVDD, SDA, or SCL for 16-address configuration |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Data Acquisition |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
ADS112C04IRTER - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
ads112c04irter-etched.step/ads112c04irter-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads112c04irter.step/ads112c04irter.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (77 pp, sha256
cfb3a0e64eee9f7a, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).