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ADS1119IPWR

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Texas Instruments Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADS1119IPWR

Texas Instruments · Analog To Digital Converters (ADCs) · TSSOP-16

ADS1119IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Digital input I2C slave address select pin 0; tie to DGND, DVDD, SDA, or SCL to set the address.
2 A1 input Digital input I2C slave address select pin 1; tie to DGND, DVDD, SDA, or SCL to set the address.
3 RESET input Active-low digital reset input; tie to DVDD if unused.
4 DGND power_in Digital ground.
5 AGND power_in Negative analog power supply.
6 AIN3 input Analog input 3.
7 AIN2 input Analog input 2.
8 REFN input Negative reference input.
9 REFP input Positive reference input.
10 AIN1 input Analog input 1.
11 AIN0 input Analog input 0.
12 AVDD power_in Positive analog power supply (2.3 V to 5.5 V); connect a 100-nF or larger capacitor to AGND.
13 DVDD power_in Positive digital power supply (2.3 V to 5.5 V); connect a 100-nF or larger capacitor to DGND.
14 DRDY output Active-low open-drain data ready output; connect to DVDD using a pullup resistor.
15 SDA bidirectional I2C serial data input and output; connect to DVDD using a pullup resistor.
16 SCL input I2C serial clock input; connect to DVDD using a pullup resistor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Converters
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power-supply voltage AVDD to AGND -0.3 7 V 4
Power-supply voltage DVDD to DGND -0.3 7 V 4
AGND to DGND -2.8 0.3 V 4
Digital input voltage 7 V SCL, SDA, A0, A1, DRDY, RESET 4
Input current -10 10 mA Continuous, any pin except power-supply pins 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -60 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human-body model, ANSI/ESDA/JEDEC JS-001 4
ESD CDM V(ESD) -750 750 V Charged-device model, JESD22-C101 4
Analog power supply AVDD to AGND AVDD 2.3 5.5 V 4
AGND to DGND -0.1 0 0.1 V 4
Digital power supply DVDD to DGND DVDD 2.3 5.5 V 4
Differential reference input voltage VREF 0.75 2.5 V VREF = V(REFP) - V(REFN); max is AVDD 4
Operating ambient temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 90.3 °C/W TSSOP (PW), 16 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 31.7 °C/W TSSOP (PW), 16 pins 5
Junction-to-board thermal resistance RθJB 41.8 °C/W TSSOP (PW), 16 pins 5
Junction-to-top characterization parameter ψJT 1.8 °C/W TSSOP (PW), 16 pins 5
Junction-to-board characterization parameter ψJB 41.2 °C/W TSSOP (PW), 16 pins 5
Absolute input current -5 5 nA VIN = 0 V 5
Differential input current -5 5 nA VCM = AVDD / 2, -VREF / Gain ≤ VIN ≤ VREF / Gain 5
Integral nonlinearity INL -15 4 15 ppmFSR AVDD = 3.3 V, VCM = AVDD / 2, best fit 5
Input offset voltage VIO -4 4 µV Differential inputs 5
Offset drift vs temperature 0.02 0.1 µV/°C 5
Gain error -0.01 0.01 % Excluding error of voltage reference 5
Gain drift vs temperature 0.3 2 ppm/°C Excluding error of voltage reference 5
Normal-mode rejection ratio 50 Hz NMRR 78 88 dB 50 Hz ±1 Hz, DR = 20 SPS 5
Normal-mode rejection ratio 60 Hz NMRR 80 88 dB 60 Hz ±1 Hz, DR = 20 SPS 5
Common-mode rejection ratio dc CMRR 90 105 dB At dc, gain = 1, AVDD = 3.3 V 5
Common-mode rejection ratio 50/60 Hz CMRR 105 115 dB fCM = 50 Hz or 60 Hz, DR = 20 SPS, AVDD = 3.3 V 5
Power-supply rejection ratio AVDD PSRR 85 105 dB AVDD at dc, VCM = AVDD / 2 5
Power-supply rejection ratio DVDD PSRR 95 115 dB DVDD at dc, VCM = AVDD / 2 5
Internal reference voltage VREF 2.048 V 5
Internal reference accuracy -0.15 0.01 0.15 % TA = 25°C, TSSOP package 5
Internal reference temperature drift 5 30 ppm/°C 5
Reference input current -10 10 nA REFP = VREF, REFN = AGND, AVDD = 3.3 V 5
Internal oscillator accuracy -2 1 2 % 5
Logic output level, low VOL 0.15 0.4 V IOL = 3 mA 6
Low-level output current IOL 3 mA VOL = 0.4 V, standard-mode, fast-mode 6
Low-level output current IOL 20 mA VOL = 0.4 V, fast-mode plus 6
Low-level output current IOL 6 mA VOL = 0.6 V, fast-mode 6
Input current Ii -10 10 µA DGND + 0.1 V < VDigital Input < DVDD, 0.1 V 6
Analog supply current, power-down IAVDD 0.1 3 µA Power-down mode 6
Digital supply current, power-down IDVDD 0.3 5 µA Power-down mode 6
Digital supply current, conversion IDVDD 65 100 µA Conversion mode 6
SCL clock frequency, standard-mode fSCL 0 100 kHz 7
SCL clock frequency, fast-mode fSCL 0 400 kHz 7
SCL clock frequency, fast-mode plus fSCL 0 1000 kHz 7
Pulse duration, RESET low tw(RSL) 250 ns 8
Delay time, START condition after RESET rising edge td(RSSTA) 100 ns 8
Absolute input current drift 10 pA/°C VIN = 0 V 5
Differential input current drift 10 pA/°C VCM = AVDD / 2, -VREF / Gain ≤ VIN ≤ VREF / Gain 5
Resolution (no missing codes) 16 Bits 5
Noise (input-referred) 62.5 µVRMS Gain = 1, DR = 20 SPS 5
Long-term drift 110 ppm 1000 hours 5
Oscillator frequency fCLK 1.024 MHz 5
Analog supply current, conversion, internal reference IAVDD 250 µA Conversion mode, internal reference selected 6
Analog supply current, conversion, external reference IAVDD 310 µA Conversion mode, external reference selected 6
Power dissipation PD 1.04 mW Conversion mode, internal reference selected 6

CAD (KiCad official)

  • Symbol: ADS1119IPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ads1119ipwr-etched.step / ads1119ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1119ipwr.step / ads1119ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (57 pp, sha256 1ff6dc9c142e8844, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF