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ADR4550BRZ-R7
Public Made by Adomby adom
Analog Devices Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADR4550BRZ-R7
Analog Devices · Voltage Reference · SOIC-8
ADR4550BRZ-R7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 2 | VIN | power_in | Input voltage connection; the family input range is 3 V to 15 V, the ADR4550 specifications are given for VIN = 5.1 V to 15 V, and the absolute maximum supply voltage is 16 V. |
| 3 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 4 | GND | power_in | Ground reference. |
| 5 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 6 | VOUT | power_out | Output voltage of 5.000 V nominal, able to source 10 mA and sink 10 mA. |
| 7 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 8 | DNC | unconnected | Do not connect; this pin must be left unconnected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Initial output voltage error (B grade, ±0.02%) | VOUT_ERR | -0.02 | 0.02 | % | 9 | ||
| Initial output voltage error (B grade, absolute) | VOUT_ERR | 1 | mV | 9 | |||
| Temperature coefficient (black box method) | TCVOUT | 2 | ppm/°C | −40°C ≤ TA ≤ +125°C (black box method) | 9 | ||
| Temperature coefficient (bow-tie method) | TCVOUT | 4 | ppm/°C | −40°C ≤ TA ≤ +125°C (bow-tie method) | 9 | ||
| Line regulation | ΔVOUT/ΔVIN | 1 | 10 | ppm/V | −40°C ≤ TA ≤ +125°C | 9 | |
| Load regulation, sink | ΔVOUT/ΔIL | 35 | 120 | ppm/mA | IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C | 9 | |
| Quiescent current | IQ | 700 | 950 | μA | −40°C ≤ TA ≤ +125°C, no load | 9 | |
| Dropout voltage (no load) | VDO | 100 | mV | −40°C ≤ TA ≤ +125°C, no load | 9 | ||
| Dropout voltage (2 mA load) | VDO | 300 | mV | −40°C ≤ TA ≤ +125°C, IL = 2 mA | 9 | ||
| Output current capability, sink | IL | -10 | mA | 9 | |||
| Output current capability, source | IL | 10 | mA | 9 | |||
| Load capacitance | 0.1 | 100 | µF | 9 | |||
| Minimum output capacitor (COUT) | COUT | 0.1 | µF | 31 | |||
| Input voltage (test range) | VIN | 5.1 | 15 | V | Table 8 header: unless otherwise noted, VIN = 5.1 V to 15 V | 9 | |
| Operating temperature range (B grade) | TA | -40 | 125 | °C | B grade | 10 | |
| Supply voltage (absolute maximum) | 16 | V | 10 | ||||
| Operating temperature range (absolute maximum) | -40 | 125 | °C | 10 | |||
| Storage temperature range | -65 | 150 | °C | 10 | |||
| Junction temperature range | -65 | 150 | °C | 10 | |||
| ESD, human body model | 6 | kV | HBM | 10 | |||
| Power supply rejection ratio (RRR) | RRR | 90 | dB | fIN = 1 kHz | 9 | ||
| Thermal resistance, junction-to-ambient (8-lead SOIC, 2-layer JEDEC board) | θJA | 120 | °C/W | 2-layer JEDEC board | 10 | ||
| Thermal resistance, junction-to-case (8-lead SOIC, 1-layer JEDEC board) | θJC | 63 | °C/W | 1-layer JEDEC board, 100 µm TIM | 10 |
CAD (KiCad official)
- Symbol:
ADR4550BRZ-R7 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adr4550brz-r7-etched.step/adr4550brz-r7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adr4550brz-r7.step/adr4550brz-r7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (37 pp, sha256
48d4d0fe0ae23886, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADR4550BRZ-R7
**Analog Devices** · Voltage Reference · SOIC-8
ADR4550BRZ-R7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 2 | VIN | power_in | Input voltage connection; the family input range is 3 V to 15 V, the ADR4550 specifications are given for VIN = 5.1 V to 15 V, and the absolute maximum supply voltage is 16 V. |
| 3 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 4 | GND | power_in | Ground reference. |
| 5 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 6 | VOUT | power_out | Output voltage of 5.000 V nominal, able to source 10 mA and sink 10 mA. |
| 7 | NIC | unconnected | Internally not connected; this pin has no internal connection. |
| 8 | DNC | unconnected | Do not connect; this pin must be left unconnected. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Initial output voltage error (B grade, ±0.02%) | VOUT_ERR | -0.02 | | 0.02 | % | | 9 |
| Initial output voltage error (B grade, absolute) | VOUT_ERR | | | 1 | mV | | 9 |
| Temperature coefficient (black box method) | TCVOUT | | | 2 | ppm/°C | −40°C ≤ TA ≤ +125°C (black box method) | 9 |
| Temperature coefficient (bow-tie method) | TCVOUT | | | 4 | ppm/°C | −40°C ≤ TA ≤ +125°C (bow-tie method) | 9 |
| Line regulation | ΔVOUT/ΔVIN | | 1 | 10 | ppm/V | −40°C ≤ TA ≤ +125°C | 9 |
| Load regulation, sink | ΔVOUT/ΔIL | | 35 | 120 | ppm/mA | IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C | 9 |
| Quiescent current | IQ | | 700 | 950 | μA | −40°C ≤ TA ≤ +125°C, no load | 9 |
| Dropout voltage (no load) | VDO | | | 100 | mV | −40°C ≤ TA ≤ +125°C, no load | 9 |
| Dropout voltage (2 mA load) | VDO | | | 300 | mV | −40°C ≤ TA ≤ +125°C, IL = 2 mA | 9 |
| Output current capability, sink | IL | -10 | | | mA | | 9 |
| Output current capability, source | IL | | | 10 | mA | | 9 |
| Load capacitance | | 0.1 | | 100 | µF | | 9 |
| Minimum output capacitor (COUT) | COUT | 0.1 | | | µF | | 31 |
| Input voltage (test range) | VIN | 5.1 | | 15 | V | Table 8 header: unless otherwise noted, VIN = 5.1 V to 15 V | 9 |
| Operating temperature range (B grade) | TA | -40 | | 125 | °C | B grade | 10 |
| Supply voltage (absolute maximum) | | | | 16 | V | | 10 |
| Operating temperature range (absolute maximum) | | -40 | | 125 | °C | | 10 |
| Storage temperature range | | -65 | | 150 | °C | | 10 |
| Junction temperature range | | -65 | | 150 | °C | | 10 |
| ESD, human body model | | | | 6 | kV | HBM | 10 |
| Power supply rejection ratio (RRR) | RRR | | 90 | | dB | fIN = 1 kHz | 9 |
| Thermal resistance, junction-to-ambient (8-lead SOIC, 2-layer JEDEC board) | θJA | | 120 | | °C/W | 2-layer JEDEC board | 10 |
| Thermal resistance, junction-to-case (8-lead SOIC, 1-layer JEDEC board) | θJC | | 63 | | °C/W | 1-layer JEDEC board, 100 µm TIM | 10 |
## CAD (KiCad official)
- Symbol: `ADR4550BRZ-R7`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `adr4550brz-r7-etched.step` / `adr4550brz-r7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adr4550brz-r7.step` / `adr4550brz-r7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883854883373056) (37 pp, sha256 `48d4d0fe0ae23886`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adr4550brz-r7-datasheet.pdf)