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ADR4540ARZ-R7

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Analog Devices Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADR4540ARZ-R7

Analog Devices · Voltage Reference · SOIC-8

ADR4540ARZ-R7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NIC unconnected Internally not connected; the pin has no internal connection and is labelled NIC in the datasheet.
2 VIN power_in Input voltage connection; for the ADR4540 the specified input range is 4.2 V to 15 V, and the absolute maximum supply rating is 16 V.
3 NIC unconnected Internally not connected; the pin has no internal connection and is labelled NIC in the datasheet.
4 GND power_in Ground reference for the reference output.
5 NIC unconnected Internally not connected; the pin has no internal connection and is labelled NIC in the datasheet.
6 VOUT power_out Voltage reference output; the datasheet states that VOUT should be connected directly to the load for the highest output voltage accuracy, and the ADR4540 nominal output is 4.096 V.
7 NIC unconnected Internally not connected; the pin has no internal connection and is labelled NIC in the datasheet.
8 DNC unconnected Do not connect; this pin must be left unconnected on the PCB.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Initial output voltage error (grade A, ±0.04%) VOUT_ERR -0.04 0.04 % 8
Initial output voltage error (grade A, absolute) VOUT_ERR 1.64 mV 8
Temperature coefficient, box method (grade A) TCVOUT 4 ppm/°C −40°C ≤ TA ≤ +125°C（黑盒法） 8
Temperature coefficient, bow-tie method (grade A) TCVOUT 8 ppm/°C −40°C ≤ TA ≤ +125°C（领结法） 8
Line regulation ΔVOUT/ΔVIN 1 10 ppm/V −40°C ≤ TA ≤ +125°C 8
Load regulation, source current ΔVOUT/ΔIL 25 80 ppm/mA IL = 0 mA至+10 mA源电流，−40°C ≤ TA ≤ +125°C 8
Load regulation, sink current ΔVOUT/ΔIL 50 120 ppm/mA IL = 0 mA至−10 mA吸电流，−40°C ≤ TA ≤ +125°C 8
Quiescent current IQ 700 950 μA −40°C ≤ TA ≤ +125°C，空载 8
Dropout voltage, no load VDO 100 mV −40°C ≤ TA ≤ +125°C，空载 8
Dropout voltage, IL = 2 mA VDO 300 mV −40°C ≤ TA ≤ +125°C，IL = 2 mA 8
Output current capability, sink IL -10 mA 吸电流 8
Output current capability, source IL 10 mA 源电流 8
Load capacitance 0.1 100 µF 8
Solder heat shift (SHR) change -0.02 0.02 % 8
Nominal output voltage VOUT 4.096 V 8
Output voltage noise, peak-to-peak eNp-p 2.7 μV p-p 0.1 Hz至10.0 Hz 8
Output voltage noise density eN 83.5 nV/√Hz 1 kHz 8
Power supply rejection ratio RRR 90 dB fIN = 1 kHz 8
Output voltage hysteresis, full cycle ΔVOUT_HYS -13 ppm +25°C至+125°C至−40°C至+25°C（全循环） 8
Output voltage hysteresis, half cycle ΔVOUT_HYS -97 ppm 25°C至125°C至25°C（半循环） 8
Output voltage hysteresis, full cycle (0 to 70°C) ΔVOUT_HYS -8 ppm 25°C至70°C至0°C至25°C（全循环） 8
Output voltage hysteresis, half cycle (0 to 70°C) ΔVOUT_HYS -17 ppm 25°C至70°C至25°C（半循环） 8
Long-term drift, early drift ΔVOUT_LTD 19 ppm TA = 25°C，250小时（早期漂移） 8
Long-term drift, 1000 hours ΔVOUT_LTD 25 ppm TA = 25°C，1000小时 8
Long-term drift, 4500 hours ΔVOUT_LTD 51 ppm TA = 25°C，4500小时 8
Turn-on settling time tR 155 µs COUT = 0.1 µF，CIN = 0.1 µF，RLOAD = 1 kΩ 8
Input voltage range (part test range) 4.2 15 V VIN test range in ADR4540 table header, unless otherwise noted 8
Supply voltage 16 V 10
Operating temperature range -40 125 °C 10
Storage temperature range -65 150 °C 10
Junction temperature range -65 150 °C 10
ESD, human body model 6 kV HBM 10
Junction-to-ambient thermal resistance, 2-layer JEDEC board θJA 120 °C/W 2层JEDEC板，8引脚SOIC 10
Junction-to-case thermal resistance θJC 63 °C/W θJC，100 µm TIM（1层JEDEC板行） 10

CAD (KiCad official)

  • Symbol: ADR4540ARZ-R7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adr4540arz-r7-etched.step / adr4540arz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adr4540arz-r7.step / adr4540arz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (37 pp, sha256 48d4d0fe0ae23886, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF