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ADR4533BRZ-R7

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Analog Devices Voltage References, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADR4533BRZ-R7

Analog Devices · Voltage References · SOIC-8

ADR4533BRZ-R7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NIC unconnected Not Internally Connected; this pin is not connected internally.
2 VIN power_in Input voltage connection; the datasheet specifies a supply voltage range of 3 V to 15 V and a 16 V absolute maximum supply voltage.
3 NIC unconnected Not Internally Connected; this pin is not connected internally.
4 GND power_in Ground reference pin for the reference.
5 NIC unconnected Not Internally Connected; this pin is not connected internally.
6 VOUT power_out Output voltage of the reference, rated for +10 mA source and −10 mA sink.
7 NIC unconnected Not Internally Connected; this pin is not connected internally.
8 DNC unconnected Do Not Connect; no connection should be made to this pin.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Initial output voltage error, B grade VOUT_ERR -0.02 0.02 % B Grade 6
Solder heat resistance shift SHR -0.02 0.02 % 6
Temperature coefficient, box method, B grade TCVOUT 2 ppm/°C B Grade −40°C ≤ TA ≤ +125°C (box method) 6
Temperature coefficient, bowtie method, B grade TCVOUT 4 ppm/°C B Grade −40°C ≤ TA ≤ +125°C (bowtie method) 6
Line regulation ΔVOUT/ΔVIN 1 10 ppm/V −40°C ≤ TA ≤ +125°C 6
Load regulation, sourcing ΔVOUT/ΔIL 30 80 ppm/mA IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 6
Load regulation, sinking ΔVOUT/ΔIL 60 120 ppm/mA IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 6
Quiescent current IQ 700 950 μA −40°C ≤ TA ≤ +125°C, no load 6
Dropout voltage, no load VDO 100 mV −40°C ≤ TA ≤ +125°C, no load 6
Dropout voltage, IL = 2 mA VDO 300 mV −40°C ≤ TA ≤ +125°C, IL = 2 mA 6
Ripple rejection ratio RRR 90 dB fIN =1 kHz 6
Output current capacity, sinking IL -10 mA Sinking 6
Output current capacity, sourcing IL 10 mA Sourcing 6
Output voltage noise eNp-p 2.1 μV p-p 0.1 Hz to 10.0 Hz 6
Output voltage noise density eN 64.2 nV/√Hz 1 kHz 6
Output voltage hysteresis, full cycle ΔVOUT_HYS -13 ppm +25°C to +125°C to −40°C to +25°C (full cycle) 6
Output voltage hysteresis, half cycle ΔVOUT_HYS -97 ppm 25°C to 125°C to 25°C (half cycle) 6
Output voltage hysteresis, 0 °C to 70 °C full cycle ΔVOUT_HYS -8 ppm 25°C to 70°C to 0°C to 25°C (full cycle) 6
Output voltage hysteresis, 0 °C to 70 °C half cycle ΔVOUT_HYS -17 ppm 25°C to 70°C to 25°C (half cycle) 6
Long-term drift, 250 hours (early life) ΔVOUT_LTD 19 ppm TA = 25°C 6
Long-term drift, 1000 hours ΔVOUT_LTD 25 ppm TA = 25°C 6
Long-term drift, 4500 hours ΔVOUT_LTD 51 ppm TA = 25°C 6
Turn-on settling time tR 135 μs COUT = 0.1 µF, CIN = 0.1 µF, RLOAD = 1 kΩ 6
Load capacitance 0.1 100 µF 6
Output voltage VOUT 3.3 V 6
Input voltage range VIN 3.4 15 V ADR4533 supply voltage, IL = 0 mA, TA = 25°C 6
Supply voltage VIN 16 V TA = 25°C, unless otherwise noted 10
Operating temperature range TA -40 125 °C 10
Storage temperature range TSTG -65 150 °C 10
Junction temperature range TJ -65 150 °C 10
Electrostatic discharge, human body model ESD HBM 6 kV Human Body Model (HBM) 10
Thermal resistance, junction to air, 1-layer JEDEC board θJA 63 °C/W 8-Lead SOIC, 1-Layer JEDEC Board 10
Thermal resistance, junction to air, 2-layer JEDEC board θJA 120 °C/W 8-Lead SOIC, 2-Layer JEDEC Board 10

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs is packaged in a SOIC plastic package and has a moisture sensi￾tivity level of MSL-1, per the JEDEC standard. However, moisture absorption from the air into the package changes the internal 38

CAD (KiCad official)

  • Symbol: ADR4533BRZ-R7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adr4533brz-r7-etched.step / adr4533brz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adr4533brz-r7.step / adr4533brz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (41 pp, sha256 de2dca59e24477c2, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF