# ADR4525WBRZ-R7

**Analog Devices** · Voltage References · SOIC-8

ADR4525WBRZ-R7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NIC | unconnected | Not Internally Connected; this pin is not connected internally. |
| 2 | VIN | power_in | Input voltage connection; the datasheet specifies an input voltage range of 3 V to 15 V and a 16 V absolute maximum supply voltage. |
| 3 | NIC | unconnected | Not Internally Connected; this pin is not connected internally. |
| 4 | GND | power_in | Ground connection for the device. |
| 5 | NIC | unconnected | Not Internally Connected; this pin is not connected internally. |
| 6 | VOUT | power_out | Output voltage of the reference; the datasheet specifies +10 mA source and −10 mA sink output current capability. |
| 7 | NIC | unconnected | Not Internally Connected; this pin is not connected internally. |
| 8 | DNC | unconnected | Do Not Connect; do not connect anything to this pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (supply voltage) range | VIN | 3 |  | 15 | V | Table 2 header, ADR4525 (B grade) | 4 |
| Supply voltage | VIN |  |  | 16 | V | TA = 25°C | 10 |
| Operating temperature range (B grade, ADR4525W) | TA | -40 |  | 125 | °C | B grade | 10 |
| Storage temperature range | TSTG | -65 |  | 150 | °C |  | 10 |
| Junction temperature range | TJ | -65 |  | 150 | °C |  | 10 |
| Electrostatic discharge, Human Body Model | HBM |  |  | 6 | kV | Human Body Model | 10 |
| Thermal resistance junction to air, 8-lead SOIC, 1-layer JEDEC board | θJA |  | 63 |  | °C/W | 1-layer JEDEC board | 10 |
| Thermal resistance junction to air, 8-lead SOIC, 2-layer JEDEC board | θJA |  | 120 |  | °C/W | 2-layer JEDEC board | 10 |
| Output voltage | VOUT |  | 2.5 |  | V | ADR4525 | 4 |
| Initial output voltage error | VOUT_ERR | -0.02 |  | 0.02 | % | B, C, D grade | 4 |
| Initial output voltage error (voltage) | VOUT_ERR |  |  | 500 | μV | B, C, D grade | 4 |
| Solder heat resistance shift | SHR | -0.02 |  | 0.02 | % | A, B, C, D grade, after 3 reflow cycles | 4 |
| Temperature coefficient, box method (B grade) | TCVOUT |  |  | 2 | ppm/°C | −40°C ≤ TA ≤ +125°C (box method) | 4 |
| Temperature coefficient, bowtie method (B grade) | TCVOUT |  |  | 4 | ppm/°C | −40°C ≤ TA ≤ +125°C (bowtie method) | 4 |
| Line regulation | ΔVOUT/ΔVIN |  | 1 | 10 | ppm/V | −40°C ≤ TA ≤ +125°C | 4 |
| Load regulation, sourcing | ΔVOUT/ΔIL |  | 30 | 80 | ppm/mA | IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C | 4 |
| Load regulation, sinking | ΔVOUT/ΔIL |  | 60 | 120 | ppm/mA | IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C | 4 |
| Quiescent current | IQ |  | 700 | 950 | μA | −40°C ≤ TA ≤ +125°C, no load | 4 |
| Dropout voltage | VDO |  |  | 500 | mV | −40°C ≤ TA ≤ +125°C, no load | 4 |
| Dropout voltage at load | VDO |  |  | 500 | mV | −40°C ≤ TA ≤ +125°C, IL = 2 mA | 4 |
| Ripple rejection ratio | RRR |  | 90 |  | dB | fIN = 1 kHz | 4 |
| Output current capacity, sinking | IL | -10 |  |  | mA | Sinking | 4 |
| Output current capacity, sourcing | IL |  |  | 10 | mA | Sourcing | 4 |
| Output voltage noise | eNp-p |  | 1.25 |  | μV p-p | 0.1 Hz to 10.0 Hz | 4 |
| Output voltage noise density | eN |  | 41.3 |  | nV/√Hz | 1 kHz | 4 |
| Output voltage hysteresis, full cycle | ΔVOUT_HYS |  | -13 |  | ppm | +25°C to +125°C to −40°C to +25°C (full cycle), A, B, C grade | 4 |
| Output voltage hysteresis, half cycle | ΔVOUT_HYS |  | -97 |  | ppm | 25°C to 125°C to 25°C (half cycle), A, B, C grade | 4 |
| Long-term drift, 250 hours (early life) | ΔVOUT_LTD |  | 19 |  | ppm | TA = 25°C, A, B, C grade | 4 |
| Long-term drift, 1000 hours | ΔVOUT_LTD |  | 25 |  | ppm | TA = 25°C, A, B, C grade | 4 |
| Long-term drift, 4500 hours | ΔVOUT_LTD |  | 51 |  | ppm | TA = 25°C, A, B, C grade | 5 |
| Turn-on settling time | tR |  | 125 |  | μs | COUT = 1 µF, CIN = 0.1 µF, RLOAD = 1 kΩ | 5 |
| Load capacitance | CL | 1 |  | 100 | μF |  | 5 |
| Minimum output capacitor | COUT | 1 |  |  | μF | ADR4520, ADR4525 | 35 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs |  | is packaged in a SOIC plastic package and has a moisture sensi￾tivity level of MSL-1, per the JEDEC standard. However, moisture absorption from the air into the package changes the internal | 38 |

## CAD (KiCad official)

- Symbol: `ADR4525WBRZ-R7`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `adr4525wbrz-r7-etched.step` / `adr4525wbrz-r7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adr4525wbrz-r7.step` / `adr4525wbrz-r7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADR4520_4525_4530_4533_4540_4550.pdf) (41 pp, sha256 `de2dca59e24477c2`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/adr4525wbrz-r7-datasheet.pdf)