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ADR4525ARZ

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Analog Devices Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADR4525ARZ

Analog Devices · Voltage Reference · SOIC-8

ADR4525ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NIC unconnected Internally not connected; this pin has no internal connection and is not part of the signal path.
2 VIN power_in Input voltage connection; the datasheet specifies VIN = 3 V to 15 V for the ADR4525 and an absolute maximum supply voltage of 16 V.
3 NIC unconnected Internally not connected; this pin has no internal connection and is not part of the signal path.
4 GND power_in Ground reference for the reference circuit.
5 NIC unconnected Internally not connected; this pin has no internal connection and is not part of the signal path.
6 VOUT power_out Reference output voltage (2.500 V nominal for ADR4525); rated for +10 mA source and −10 mA sink, and the datasheet recommends connecting VOUT directly to the load for highest output accuracy.
7 NIC unconnected Internally not connected; this pin has no internal connection and is not part of the signal path.
8 DNC unconnected Do not connect; this pin must be left unconnected and not wired externally.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Initial output voltage error (grade A) VOUT_ERR -0.04 0.04 % 5
Initial output voltage error (grade A, absolute) VOUT_ERR 1 mV A级 5
Temperature coefficient (black box method, grade A) TCVOUT 4 ppm/°C −40°C ≤ TA ≤ +125°C（黑盒法） 5
Temperature coefficient (bow-tie method, grade A) TCVOUT 8 ppm/°C −40°C ≤ TA ≤ +125°C（领结法） 5
Voltage regulation ΔVOUT/ΔVIN 1 10 ppm/V −40°C ≤ TA ≤ +125°C 5
Load regulation (sourcing) ΔVOUT/ΔIL 30 80 ppm/mA IL = 0 mA至+10 mA拉电流，−40°C ≤ TA ≤ +125°C 5
Load regulation (sinking) ΔVOUT/ΔIL 60 120 ppm/mA IL = 0 mA至−10 mA灌电流，−40°C ≤ TA ≤ +125°C 5
Quiescent current (no load) IQ 700 950 μA −40°C ≤ TA ≤ +125°C，空载 5
Dropout voltage (no load) VDO 500 mV −40°C ≤ TA ≤ +125°C，空载 5
Dropout voltage (IL = 2 mA) VDO 500 mV −40°C ≤ TA ≤ +125°C，IL = 2 mA 5
Output current capability (sink) IL -10 mA 灌电流 5
Output current capability (source) IL 10 mA 拉电流 5
Load capacitance 1 100 µF 5
Ripple rejection ratio RRR 90 dB fIN = 1 kHz 5
Output voltage noise (0.1 Hz to 10.0 Hz) eNp-p 1.25 μV p-p 0.1 Hz至10.0 Hz 5
Output voltage noise density eN 41.3 nV/√Hz 1 kHz 5
Thermal hysteresis (full cycle 25→125→−40→25) ΔVOUT_HYS -13 ppm +25°C至+125°C至−40°C至+25°C（全循环） 5
Thermal hysteresis (half cycle 25→125→25) ΔVOUT_HYS -97 ppm 25°C至125°C至25°C（半循环） 5
Thermal hysteresis (full cycle 25→70→0→25) ΔVOUT_HYS -8 ppm 25°C至70°C至0°C至25°C（全循环） 5
Thermal hysteresis (half cycle 25→70→25) ΔVOUT_HYS -17 ppm 25°C至70°C至25°C（半循环） 5
Long-term drift (250 hours, early drift) ΔVOUT_LTD 19 ppm TA = 25°C，250小时（早期漂移） 5
Long-term drift (1000 hours) ΔVOUT_LTD 25 ppm TA = 25°C，1000小时 5
Long-term drift (4500 hours) ΔVOUT_LTD 51 ppm TA = 25°C，4500小时 5
Turn-on settling time tR 125 µs COUT = 1 µF，CIN = 0.1 µF，RLOAD = 1 kΩ 5
Input voltage range (recommended operating) VIN 3 15 V Electrical characteristics test conditions (VIN = 3 V to 15 V) 5
Supply voltage (absolute maximum) VIN 16 V 10
Operating temperature range TA -40 125 °C 10
Storage temperature range TSTG -65 150 °C 10
Junction temperature range TJ -65 150 °C 10
ESD human body model 6 kV HBM 10
Thermal resistance, junction-to-air (2-layer JEDEC board) θJA 120 °C/W 8-lead SOIC, 2-layer JEDEC board 10
Thermal resistance, junction-to-case (1-layer JEDEC board) θJC 63 °C/W 8-lead SOIC, 1-layer JEDEC board, 100 µm TIM 10

CAD (KiCad official)

  • Symbol: ADR4525ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adr4525arz-etched.step / adr4525arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adr4525arz.step / adr4525arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (37 pp, sha256 512ab2dfe214da56, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF