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ADP7104ARDZ-R7

Analog Devices · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8-EP

ADP7104ARDZ-R7 from Analog Devices, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output voltage; a 1 µF or larger bypass capacitor should be connected from VOUT to GND.
2 SENSE/ADJ input On fixed-voltage versions this pin is SENSE, which measures the load voltage and should be placed as close to the load as possible; on adjustable versions it is ADJ, the external divider input that sets VOUT = 1.22 V × (1 + R1/R2).
3 GND power_in Ground.
4 NC unconnected No connect; do not connect to this pin.
5 EN/UVLO input Enable input: driving it high starts the regulator and driving it low shuts it down, and tying it to VIN gives automatic start-up, with programmable UVLO thresholds set by external resistors.
6 GND power_in Ground.
7 PG output Open-drain power-good output that requires an external pull-up to VIN or VOUT and goes low when VOUT falls below 90% of nominal or when the part is in shutdown, current limit, or thermal shutdown; it may be left floating or tied to ground if unused.
8 VIN power_in Regulator input supply, specified for 3.3 V to 20 V, with a 1 µF or larger bypass capacitor from VIN to GND.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8-EP
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 3.3 20 V 3
Working supply current (IOUT = 100 µA, TJ range) IGND 900 µA IOUT = 100 µA, VIN = 10 V, TJ = −40°C至+125°C 3
Working supply current (IOUT = 10 mA, TJ range) IGND 1050 µA IOUT = 10 mA, VIN = 10 V, TJ = −40°C至+125°C 3
Working supply current (IOUT = 300 mA, TJ range) IGND 1400 µA IOUT = 300 mA, VIN = 10 V, TJ = −40°C至+125°C 3
Working supply current (IOUT = 500 mA, TJ range) IGND 1600 µA IOUT = 500 mA, VIN = 10 V, TJ = −40°C至+125°C 3
Shutdown current IGND-SD 40 50 µA EN = GND, VIN = 12 V 3
Shutdown current (TJ range) IGND-SD 75 µA EN = GND, VIN = 12 V, TJ = −40°C至+125°C 3
Input reverse current (TJ range) IREV-INPUT 5 µA EN = GND, VIN = 0 V, VOUT = 20 V, TJ = −40°C至+125°C 3
Adjustable output voltage accuracy VADJ 1.21 1.22 1.23 V IOUT = 10 mA 3
Adjustable output voltage accuracy (load and line range, TJ range) VADJ 1.196 1.232 V 1 mA < IOUT < 500 mA, VIN = (VOUT + 1 V) to 20 V, TJ = −40°C至+125°C 3
Line regulation ΔVOUT/ΔVIN -0.015 0.015 %/V VIN = (VOUT + 1 V) to 20 V, TJ = −40°C至+125°C 3
Load regulation (TJ range) ΔVOUT/ΔIOUT 0.75 %/A IOUT = 1 mA至500 mA, TJ = −40°C至+125°C 3
Dropout voltage (TJ range) VDROPOUT 40 mV IOUT = 10 mA, TJ = −40°C至+125°C 3
Dropout voltage (TJ range) VDROPOUT 175 mV IOUT = 150 mA, TJ = −40°C至+125°C 3
Dropout voltage (TJ range) VDROPOUT 325 mV IOUT = 300 mA, TJ = −40°C至+125°C 3
Dropout voltage (TJ range) VDROPOUT 550 mV IOUT = 500 mA, TJ = −40°C至+125°C 3
Current limit threshold ILIMIT 625 775 1000 mA 3
UVLO threshold rising UVLORISE 1.18 1.22 1.28 V 3.3 V ≤ VIN ≤ 20 V, TJ = −40°C to +125°C 4
UVLO hysteresis current UVLOHYS 7.5 9.8 12 µA VEN > 1.25 V, TJ = −40°C至+125°C 4
Minimum input and output capacitance CMIN 0.7 µF TA = −40°C至+125°C 4
Capacitor ESR RESR 0.001 0.2 Ω TA = −40°C至+125°C 4
VIN to GND VIN -0.3 22 V 5
VOUT to GND VOUT -0.3 20 V 5
EN/UVLO to GND EN/UVLO -0.3 V 5
PG to GND PG -0.3 V 5
SENSE/ADJ to GND SENSE/ADJ -0.3 V 5
Storage temperature range -65 150 °C 5
Operating junction temperature range TJ -40 125 °C 5
Junction-to-ambient thermal resistance, 8-lead SOIC θJA 48.5 °C/W 5
Junction-to-case thermal resistance, 8-lead SOIC θJC 58.4 °C/W 5
Junction-to-board thermal characteristic, 8-lead SOIC ΨJB 31.3 °C/W 5
Typical junction-to-ambient thermal resistance vs copper area, SOIC θJA 167.8 °C/W copper area 251 mm2 20
Typical junction-to-ambient thermal resistance vs copper area, SOIC θJA 111 °C/W copper area 100 mm2 20
Typical junction-to-ambient thermal resistance vs copper area, SOIC θJA 65.9 °C/W copper area 500 mm2 20
Typical junction-to-ambient thermal resistance vs copper area, SOIC θJA 56.1 °C/W copper area 1000 mm2 20
Typical junction-to-ambient thermal resistance vs copper area, SOIC θJA 45.8 °C/W copper area 6400 mm2 20

CAD (KiCad official)

  • Symbol: ADP7104ARDZ-R7
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: adp7104ardz-r7-etched.step / adp7104ardz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adp7104ardz-r7.step / adp7104ardz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 269a0ae0cec349ea, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF