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ADP5040ACPZ-1-R7

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Analog Devices DC-DC Converters, LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADP5040ACPZ-1-R7

Analog Devices · DC-DC Converters · LFCSP-20(4x4)

ADP5040ACPZ-1-R7 from Analog Devices, in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB3 input LDO2 feedback input, used with external resistor dividers to program the LDO2 output voltage.
2 VOUT3 power_out LDO2 regulated output voltage, 300 mA LDO output.
3 VIN3 power_in LDO2 input supply, operating from 1.7 V to 5.5 V.
4 EN3 input Enable LDO2: high turns LDO2 on and low turns LDO2 off.
5 DNC unconnected Do not connect this pin.
6 AVIN power_in Housekeeping input supply, operating from 2.3 V to 5.5 V.
7 VIN1 power_in Buck regulator input supply, operating from 2.3 V to 5.5 V.
8 SW output Buck regulator switching node.
9 PGND power_in Dedicated power ground for the buck regulator.
10 EN1 input Enable buck regulator: high turns the buck on and low turns it off.
11 VOUT1 input Buck output sensing node.
12 FB1 input Buck regulator feedback input, used with external resistor dividers to program the buck output voltage.
13 VIN2 power_in LDO1 input supply, operating from 1.7 V to 5.5 V.
14 VOUT2 power_out LDO1 regulated output voltage, 300 mA LDO output.
15 FB2 input LDO1 feedback input, used with external resistor dividers to program the LDO1 output voltage.
16 EN2 input Enable LDO1: high turns LDO1 on and low turns LDO1 off.
17 MODE input Buck mode select: high forces fixed PWM operation, while low selects power save mode (PSM) at light load and constant PWM at higher load.
18 DNC unconnected Do not connect this pin.
19 DNC unconnected Do not connect this pin.
20 DNC unconnected Do not connect this pin.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package LFCSP-20(4x4)
Category Power Management (PMIC)
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range (buck, AVIN/VIN1) VIN1 2.3 5.5 V 3
Input voltage range (LDO, VIN2/VIN3) VIN2, VIN3 1.7 5.5 V TJ = −40°C to +125°C 4
Output voltage accuracy (buck) VOUT1 -3 3 % PWM mode, ILOAD = 0 mA to 1200 mA 3
Output voltage accuracy (LDO) VOUT2, VOUT3 -3 3 % 100 μA < IOUT2 < 300 mA, 100 μA < IOUT3 < 300 mA 4
Buck voltage feedback VFB1 0.485 0.5 0.515 V 3
LDO voltage feedback VFB2, VFB3 0.485 0.5 0.515 V 4
LDO line regulation (ΔVOUT2/VOUT2)/ΔVIN2 -0.03 0.03 %/V VIN2 = (VOUT2 + 0.5 V) to 5.5 V 4
LDO load regulation (ΔVOUT2/VOUT2)/ΔIOUT2 0.002 0.0075 %/mA IOUT2 = IOUT3 = 1 mA to 300 mA 4
Buck line regulation (ΔVOUT1/VOUT1)/ΔVIN1 -0.05 %/V PWM mode 3
Buck load regulation (ΔVOUT1/VOUT1)/ΔIOUT1 -0.1 %/A ILOAD = mA to 1200 mA, PWM mode 3
DC operating current (no load, not switching) INOLOAD 21 35 μA ILOAD = 0 mA, device not switching, all other channels disabled 3
Shutdown current ISHTD 0.2 1 μA EN1 = 0 V, TA = TJ = −40°C to +125°C 3
PWM to PSM current threshold IPSM_L 100 mA 3
PFET on resistance RPFET 180 240 mΩ PFET, AVIN = VIN1 = 3.6 V 4
PFET on resistance RPFET 140 190 mΩ PFET, AVIN = VIN1 = 5 V 4
NFET on resistance RNFET 170 235 mΩ NFET, AVIN = VIN1 = 3.6 V 4
NFET on resistance RNFET 150 210 mΩ NFET, AVIN = VIN1 = 5 V 4
Buck current limit ILIMIT 1600 1950 2300 mA PFET switch peak current limit 4
Buck active pull-down resistance 85 Ω EN1 = 0 V 4
Oscillator frequency FOSC 2.5 3 3.5 MHz 4
LDO bias current per LDO IVIN2BIAS / IVIN3BIAS 10 30 μA IOUT3 = IOUT4 = 0 μA 4
LDO bias current per LDO IVIN2BIAS / IVIN3BIAS 60 100 μA IOUT2 = IOUT3 = 10 mA 4
LDO bias current per LDO IVIN2BIAS / IVIN3BIAS 165 245 μA IOUT2 = IOUT3 = 300 mA 4
LDO dropout voltage (3.3 V output) VDROPOUT 86 140 mV VOUT2 = VOUT3 = 3.3 V, IOUT2 = IOUT3 = 300 mA 4
LDO dropout voltage (5.0 V output) VDROPOUT 72 mV VOUT2 = VOUT3 = 5.0 V, IOUT2 = IOUT3 = 300 mA 4
LDO dropout voltage (2.5 V output) VDROPOUT 107 mV VOUT2 = VOUT3 = 2.5 V, IOUT2 = IOUT3 = 300 mA 4
LDO dropout voltage (1.8 V output) VDROPOUT 180 mV VOUT2 = VOUT3 = 1.8 V, IOUT2 = IOUT3 = 300 mA 4
LDO current-limit threshold ILIMIT 335 470 mA TJ = −40°C to +125°C 4
LDO active pull-down resistance RPDLDO 600 Ω EN2/EN3 = 0 V 4
Total system input current, LDO1 or LDO2 only IIN 53 μA IOUT2 = IOUT3 = 0 μA, all other channels disabled 4
Total system input current, LDO1 and LDO2 only IIN 74 μA IOUT2 = IOUT3 = 0 μA, buck disabled 4
Shutdown current IGND-SD 0.1 2 μA ENx = GND 3
Input logic high threshold VIH 1.2 V 2.5 V ≤ AVIN ≤ 5.5 V 3
Input logic low threshold VIL 0.4 V 2.5 V ≤ AVIN ≤ 5.5 V 3
Input leakage current VI-LEAKAGE 0.05 1 μA ENx = AVIN or GND 3
Buck start-up time tSTART1 250 μs 3
LDO1, LDO2 start-up time tSTART2 85 μs VOUT2, VOUT3 = 3.3 V 3
AVIN undervoltage lockout rising, Option 0 UVLOAVINRISE 2.275 V Option 0 3
AVIN undervoltage lockout rising, Option 1 UVLOAVINRISE 3.9 V Option 1 3
AVIN undervoltage lockout falling, Option 0 UVLOAVINFALL 1.95 V Option 0 3
AVIN undervoltage lockout falling, Option 1 UVLOAVINFALL 3.1 V Option 1 3
Thermal shutdown threshold TSSD 150 °C TJ rising 3
Thermal shutdown hysteresis TSSD-HYS 20 °C 3
Input capacitance (buck) CMIN1 4.7 40 μF TJ = −40°C to +125°C 5
Output capacitance (buck) CMIN2 7 40 μF TJ = −40°C to +125°C 5
Input and output capacitance (LDO1, LDO2) CMIN3 0.7 μF TJ = −40°C to +125°C 5
Capacitor ESR RESR 0.001 1 Ω TJ = −40°C to +125°C 5
Buck output voltage range VOUT1 0.8 3.8 V 1
LDO output voltage range VOUT2, VOUT3 0.8 5.2 V 1
Buck inductor value L 0.7 3 μH Recommended inductor range 29
AVIN to AGND AVIN -0.3 6 V 6
VIN1 to AVIN VIN1 -0.3 0.3 V 6
PGND to AGND PGND -0.3 0.3 V 6
VIN2, VIN3, VOUTx, ENx, MODE, FBx, SW to AGND -0.3 V Printed maximum is (AVIN + 0.3 V) 6
SW to PGND SW -0.3 V Printed maximum is (VIN1 + 0.3 V) 6
Storage temperature range -65 150 °C 6
Operating junction temperature range TJ -40 125 °C 6
ESD Human Body Model 3000 V 6
Junction-to-ambient thermal resistance θJA 38 °C/W 20-Lead, 0.5 mm pitch LFCSP 6
Junction-to-case thermal resistance θJC 4.2 °C/W 20-Lead, 0.5 mm pitch LFCSP 6

CAD (KiCad official)

  • Symbol: ADP5040ACPZ-1-R7
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)
  • 3D model files: adp5040acpz-1-r7-etched.step / adp5040acpz-1-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adp5040acpz-1-r7.step / adp5040acpz-1-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (37 pp, sha256 a057dc69ab398a1a, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF