# ADP120N080G2

**ANHI** · Silicon Carbide Field Effect Transistor (MOSFET) · TO-220

ADP120N080G2 from ANHI, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate control input with static gate-source voltage range of -5 V to 20 V and threshold voltage of 2.0 to 4.0 V. |
| 2 | D | passive | Drain terminal rated for 1200 V drain-source breakdown and 35 A continuous current at TC=25°C. |
| 3 | S | passive | Source terminal of the MOSFET, carrying the continuous body-diode source current up to 35 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ANHI |
| Package | TO-220 |
| Category | Silicon Carbide (SiC) Devices |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Continuous drain current | ID |  |  | 35 | A | TC=25°C | 3 |
| Continuous drain current | ID |  |  | 26 | A | TC=100°C | 3 |
| Avalanche energy, single pulse | EAS |  |  | 200 | mJ | Tc=25℃,VDD=50V,L=1mH, RG=25Ω | 3 |
| Gate source voltage (static) | VGS | -5 |  | 20 | V | static; | 3 |
| Power dissipation | Ptot |  |  | 188 | W | TC=25°C | 3 |
| Derating factor above 25°C |  |  |  | 1.9 | W/°C |  | 3 |
| Storage temperature | Tstg | -55 |  | 175 | °C |  | 3 |
| Operating junction temperature | Tj | -55 |  | 175 | °C |  | 3 |
| Soldering temperature | TL |  |  | 300 | °C | Distance of 1.6mm from case for 10s | 3 |
| Thermal resistance, junction - case | RthJC |  | 0.65 | 0.8 | °C/W |  | 4 |
| Thermal resistance, junction - ambient | RthJA |  |  | 40 | °C/W | device on PCB, minimal footprint | 4 |
| Drain-source breakdown voltage | V(BR)DSS | 1200 |  |  | V | VGS=0V, ID=1mA | 5 |
| Gate threshold voltage | V(GS)th | 2 | 2.8 | 4 | V | VDS=VGS, ID=10mA | 5 |
| Zero gate voltage drain current | IDSS |  |  | 1 | uA | VDS=1200V, VGS=0V | 5 |
| Gate-source leakage current | IGSS+ |  |  | 100 | nA | VGS=20V, VDS=0V | 5 |
| Gate-source leakage current | IGSS- |  |  | -100 | nA | VGS=-5V, VDS=0V | 5 |
| Drain-source on-state resistance | RDS(on) |  | 80 | 100 | mΩ | VGS=20V, ID=20A, Tj=25°C | 5 |
| Continuous source current | ISD |  |  | 35 | A |  | 6 |

## CAD (KiCad official)

- Symbol: `ADP120N080G2`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files: `adp120n080g2-etched.step` / `adp120n080g2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adp120n080g2.step` / `adp120n080g2.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ANHI datasheet](docs/adp120n080g2-datasheet.pdf) (18 pp, sha256 `0bd82c1ca02f01bd`, retrieved 2026-10-29, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/adp120n080g2-datasheet.pdf)