Adom Library

@@ -66,5 +66,80 @@ adom-lbr-owned bookkeeping. | `bind-3d` rejected the URN | self-uploaded → `--wip-urn`; managed → `--urn` | | 3D offset / wrong pin 1 | run chipfit; set `placement` in the sidecar before FINISH | +## Drawing the 3D chip outline onto the symbol — `--symbol-art`++adom-symbol does a lot of work to produce a **vector line-drawing of the chip**+(`<mpn>-3d-outline-*.svg`). `--symbol-art` puts that drawing **on the schematic+symbol**, so the part shows a little picture of itself in Fusion / Altium / OrCAD.++```bash+adom-lbr generate --sym part.kicad_sym --fp part.kicad_mod \+  --symbol-art part-3d-outline.svg -o part.lbr+```++### The format — SVG polylines → EAGLE wires++The outline SVGs are already **flattened polylines** (no beziers) in a 320×320+pixel space. adom-lbr transcribes them into the symbol:++- each `<polyline>`/`<polygon>` point-run → a chain of EAGLE `<wire>`s on **layer 94**,+- SVG is Y-down, EAGLE is Y-up → **Y is negated**,+- the drawing is **decimated** (dense curve sampling collapsed) and **centred ++  scaled** to the symbol body.++The transcription is pixel-faithful — here's adom-symbol's source outline next to+exactly what lands on the symbol:++![Source outline SVG vs the same outline transcribed onto the symbol as wires](symbol-art-transcribe.png)++### Matching adom-symbol's size (the iterations)++adom-symbol sizes the outline to a **small centred icon** (~⅓ of the body) so it+doesn't crowd the pins/labels. The first pass drew it too big; tuning the fit to+**0.38× the body's smaller side** matches adom-symbol's own placement:++![adom-symbol's default symbol render vs adom-lbr's matched 0.38x placement](symbol-art-sizing.png)++> **Standing rule:** always match what adom-symbol gives you as closely as you can.+> If the match drifts, the real fix is a tighter contract from adom-symbol (emit the+> outline already in symbol mm-space). See [../../docs/ROADMAP.md](../../docs/ROADMAP.md).++Tune per-part with `--symbol-art-scale <frac>` (default `0.38`; higher = bigger).++### Pitfall — a too-detailed outline bloats the library++A detailed outline is a *lot* of wires. The `-blueprint` variant ≈ **3000 `<wire>`s+/ ~300 KB** for one part — that bloats the `.lbr` and can lag Fusion's symbol+editor. So the tool **warns the AI in-band** and tells it to pass a simpler outline:++![Light outline gets a friendly note; heavy outline triggers a WARN to use a simpler one](symbol-art-hints.png)++Rule of thumb: `-bold` / `-thin` (~120 KB) for normal use or batching a whole+library; `-blueprint` (~300 KB) only when you want the full iso wireframe on one+showcase part.++### Commands the AI can call++```bash+# default look (matches adom-symbol, light outline)+adom-lbr generate --sym P.kicad_sym --fp P.kicad_mod --symbol-art P-3d-outline-bold.svg -o P.lbr++# bigger icon+adom-lbr generate --sym P.kicad_sym --fp P.kicad_mod --symbol-art P-3d-outline-bold.svg --symbol-art-scale 0.55 -o P.lbr++# full detail (heavy — only when you want it)+adom-lbr generate --sym P.kicad_sym --fp P.kicad_mod --symbol-art P-3d-outline-blueprint.svg -o P.lbr+```++### Sample prompts (what a user says → what the AI runs)++- *"Make a Fusion library for this part and put the chip drawing on the symbol."*+  → `generate --fp … --symbol-art <mpn>-3d-outline-bold.svg`+- *"The chip picture on the symbol is too big."* → re-run with `--symbol-art-scale 0.3`.+- *"My .lbr is huge / the symbol editor is laggy."* → the heavy-art WARN already told you:+  swap `-blueprint` for `-bold`/`-thin`, or drop `--symbol-art`.+- *"Match adom-symbol exactly."* → use adom-symbol's outline SVG as `--symbol-art`; for a+  pixel-exact match, ask adom-symbol for the mm-space outline (see ROADMAP).+ → **Agent-facing rules: [SKILL.md](SKILL.md).** The app, full CLI, and live 3-column viewer: **[adom/adom-lbr](https://wiki.adom.inc/adom/adom-lbr)**.