Adom Fields
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Adom Fields: where the current and the heat go on your board.
Two-layer KiCad through-hole pads introduce nonexistent inner copper layers
adom-fields 0.7.15, Linux x86_64; standalone CLI reproduction, no Bridge required.
A two-layer KiCad board with through-hole pads is solved on four copper layers. This was first observed on 2026-10-13. Duplicate bug reports were checked before filing.
The attached synthetic board declares only F.Cu and B.Cu. J1.1 and U1.1 are 2 mm through-hole pads connected by a 1 mm front trace. The load is 25 mA. Run:
adom-fields analyze --board fixture.kicad_pcb --spec spec.json --out output --pitch 0.5 --no-parts --no-silk
Expected: only the two real copper layers can contribute pad copper, barrel coupling or thermal spreading.
Actual (exit 0):
3V3: 0.025 A, 4 layer(s), 70 iterations, residual 8.4e-8
heat, still air: 144 iterations, residual 8.9e-8
heat, moving air: 137 iterations
OK: 1 nets solved, 0 hot parts, 0 issue(s), in 0.0 s
Source inspection finds a fixed LAYERS=[F.Cu, In1.Cu, In2.Cu, B.Cu] in src/board.rs. Through-hole pad expansion uses every entry, without filtering the saved board's layer_names. src/fields.rs selects live layers from raster copper, so nonexistent inner-layer pad copper participates. The attached fields.json is synthetic diagnostic evidence, not a qualified result. No screenshot is needed for this headless reproduction.
Please derive copper layers and interlayer spacing from the actual saved stackup, expand plated pads only onto real copper layers, and regress both two- and four-layer boards. Existing review work on plated-wall coupling and unclipped current maxima should remain required independently. No patch has been compiled here. The production analysis was stopped and no current/thermal acceptance was claimed from it.