Adom Fields

@@ -1,31 +0,0 @@-# Adom Fields: signal integrity (`--with si`)--Turn on `si` when the board has differential pairs (USB, Ethernet, LVDS, MIPI), clocks or fast buses (SPI, SDIO, QSPI), traces over about 50 mm, or impedance targets.--## Reflections and TDR (0.9.6)--`review.reflections` checks the nets where edges matter: spec `impedance` targets, `clocks`, `lengthGroups` members, and any net in spec `tdr: {net: {driverOhm, riseNs, loadPf, from, to}}`.-- **The model:**-  - **The path:** the net's copper is walked from the driver pad (`from`, else the first IC pin) to the receiver (`to`, else the farthest pad), segment by segment and through vias.-  - **The line:** each segment is a lossless line with the cross-section solve's Z0 and delay, and each via adds its pad capacitance (Johnson & Graham).-  - **What is not modelled:** branches off the path are counted, not simulated.-- **Two ngspice runs:**-  - **TDR:** a 50 Ω, 35 ps step gives `tdr.points` (ps, Ω), the impedance profile along the path.-  - **In use:** the real driver (25 Ω and 1 ns by default; a clock's edge is 7 % of its period) into a 3 pF receiver gives `inUse`: overshoot, undershoot, settling time, and the series termination (line Z0 less the driver's resistance).-- **Short nets:** a path shorter than a sixth of its edge is `electricallyShort` and only says so.-- **Issues:** overshoot over 15 % raises a `reflection` issue, with an `add-part` action for the series resistor at the driver pin.-- **On the ESC's SWD clock** (73 mm, 449 ps of 58 Ω line, a 0.5 ns edge from 20 Ω): 40 % overshoot, fixed by a 38 Ω series resistor. The DShot input (2 ns edge) is electrically short.-- `impedance` segments' `psPerMm` is now in ps/mm (it read a million times too high before 0.9.6).--## Conducting blocks and signals (0.4.0)--Read `docs/heatsinks-and-signals.md` in the package before specifying these models. Use measured conductivity/contact resistance for `heatsinks`; contact is to the board face, not an automatically modeled chip lid. Never add a fictitious heatsink to make a gate pass. Inspect both air conditions and mesh sensitivity.--For signal screening, provide `signals.capacitance` or `signals.differentialPairs`, explicit consistent `stackupMm`, and justified epsilonR. Inspect Signals with `adom-fields ui --port 8874 view --quantity signals`. Unsupported geometry must stay unsupported; do not replace null estimates with guessed numbers. This is outer-layer microstrip and adjacent-layer overlap screening, not high-frequency signoff. The summary records assumptions and primary references.--## Also in this area--- **Trace impedance** (0.9.0, `review.impedance`): a 2-D Laplace field solve of every signal net's cross-section on its own layer (microstrip or stripline, solder mask unless `rf.noSolderMask`).-  - It gives Z0, εeff, ps/mm, pF/m and nH/m, plus Zodd, Zeven and Zdiff for pairs found by name (_P/_N, +/-, DP/DM).-  - Targets come from spec `impedance` {net: Ω, "P/N": Ω differential} or by protocol (USB 90, PCIe 85, Ethernet/LVDS/HDMI/MIPI 100).-  - It is validated within about 2 % of Hammerstad-Jensen and Cohn.