component
ADM706ARZ-REEL7
Public Made by Adomby adom
Analog Devices Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ADM706ARZ-REEL7
Analog Devices · Supervisor And Reset ICs · SOIC-8
ADM706ARZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Manual reset input: a reset is generated when this pin is taken below 0.8 V, it is internally debounced, and an internal 250 µA pull-up holds it high when floating. |
| 2 | VCC | power_in | 5 V power supply input with an operating voltage range of 1.0 V to 5.5 V; place a 0.1 µF decoupling capacitor between VCC and GND. |
| 3 | GND | power_in | 0 V ground reference for all signals. |
| 4 | PFI | input | Power-fail input to the noninverting input of the power-fail comparator; PFO goes low when PFI is below 1.25 V, and PFI must be connected to GND if unused. |
| 5 | PFO | output | Power-fail comparator output that goes low when PFI is less than 1.25 V. |
| 6 | WDI | input | Three-level watchdog input: if WDI stays high or low longer than the 1.60 s watchdog timeout, WDO goes low, any transition clears the timer, and the watchdog is disabled when WDI is left floating. |
| 7 | RESET | output | Active-low reset output that goes low for 200 ms when VCC is below the reset threshold (4.40 V for ADM706) or MR is low, and stays low for 200 ms after VCC rises above the threshold or MR goes high. |
| 8 | WDO | output | Watchdog output that goes low when the watchdog timer times out and remains low until the timer is cleared; it also goes low during low-line conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Operating Voltage Range | VCC | 1 | 5.5 | V | 3 | ||
| Supply Current | 190 | 250 | µA | 3 | |||
| Reset Threshold (ADM706/ADM708) | 4.25 | 4.4 | 4.5 | V | ADM706/ADM708 | 3 | |
| RESET Pulse Width | 160 | 200 | 280 | ms | 3 | ||
| RESET Output Voltage (low) | 0.4 | V | ISINK = 3.2 mA | 3 | |||
| RESET Output Voltage (low) | 0.3 | V | VCC = 1 V, ISINK = 50 µA | 3 | |||
| Watchdog Timeout Period | tWD | 1 | 1.6 | 2.25 | sec | VIL = 0.4 V, VIH = VCC × 0.8, WDI = VCC | 3 |
| WDI Pulse Width | tWP | 50 | ns | 3 | |||
| WDI Input Threshold, Logic Low | 0.8 | V | 3 | ||||
| WDI Input Threshold, Logic High | 3.5 | V | 3 | ||||
| WDI Input Current (high) | 50 | 150 | µA | WDI = 0 V | 3 | ||
| WDI Input Current (low) | -150 | -50 | µA | WDI = 0 V | 3 | ||
| MR Pull-Up Current | 100 | 250 | 600 | µA | MR = 0 V | 3 | |
| MR Pulse Width | 150 | ns | 3 | ||||
| MR Input Threshold, Logic Low | 0.8 | V | 3 | ||||
| MR Input Threshold, Logic High | 2 | V | 3 | ||||
| MR to RESET Output Delay | 250 | ns | 3 | ||||
| PFI Input Threshold | 1.2 | 1.25 | 1.3 | V | 3 | ||
| PFI Input Current | -25 | 0.01 | 25 | nA | 3 | ||
| PFO Output Voltage (low) | 0.4 | V | ISINK = 3.2 mA | 3 | |||
| VCC Supply Voltage (absolute maximum) | VCC | -0.3 | 6 | V | 4 | ||
| All Other Inputs Voltage (absolute minimum) | -0.3 | V | 4 | ||||
| Input Current, VCC pin | 20 | mA | 4 | ||||
| Input Current, GND pin | 20 | mA | 4 | ||||
| Digital Output Current | 20 | mA | 4 | ||||
| Power Dissipation, R-8 SOIC | 470 | mW | 4 | ||||
| Operating Temperature Range (Industrial, Version A) | -40 | 85 | °C | 4 | |||
| Lead Temperature (Soldering, 10 sec) | 300 | °C | 4 | ||||
| Lead Temperature, Vapor Phase (60 sec) | 215 | °C | 4 | ||||
| Lead Temperature, Infrared (15 sec) | 220 | °C | 4 | ||||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| ESD Rating | 4.5 | kV | 4 | ||||
| Hysteresis, Reset Threshold | 40 | mV | 3 | ||||
| Thermal Impedance θJA, R-8 SOIC | θJA | 110 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
ADM706ARZ-REEL7 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adm706arz-reel7-etched.step/adm706arz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adm706arz-reel7.step/adm706arz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (12 pp, sha256
61bcbb4abfdc3081, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADM706ARZ-REEL7
**Analog Devices** · Supervisor And Reset ICs · SOIC-8
ADM706ARZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Manual reset input: a reset is generated when this pin is taken below 0.8 V, it is internally debounced, and an internal 250 µA pull-up holds it high when floating. |
| 2 | VCC | power_in | 5 V power supply input with an operating voltage range of 1.0 V to 5.5 V; place a 0.1 µF decoupling capacitor between VCC and GND. |
| 3 | GND | power_in | 0 V ground reference for all signals. |
| 4 | PFI | input | Power-fail input to the noninverting input of the power-fail comparator; PFO goes low when PFI is below 1.25 V, and PFI must be connected to GND if unused. |
| 5 | PFO | output | Power-fail comparator output that goes low when PFI is less than 1.25 V. |
| 6 | WDI | input | Three-level watchdog input: if WDI stays high or low longer than the 1.60 s watchdog timeout, WDO goes low, any transition clears the timer, and the watchdog is disabled when WDI is left floating. |
| 7 | RESET | output | Active-low reset output that goes low for 200 ms when VCC is below the reset threshold (4.40 V for ADM706) or MR is low, and stays low for 200 ms after VCC rises above the threshold or MR goes high. |
| 8 | WDO | output | Watchdog output that goes low when the watchdog timer times out and remains low until the timer is cleared; it also goes low during low-line conditions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Operating Voltage Range | VCC | 1 | | 5.5 | V | | 3 |
| Supply Current | | | 190 | 250 | µA | | 3 |
| Reset Threshold (ADM706/ADM708) | | 4.25 | 4.4 | 4.5 | V | ADM706/ADM708 | 3 |
| RESET Pulse Width | | 160 | 200 | 280 | ms | | 3 |
| RESET Output Voltage (low) | | | | 0.4 | V | ISINK = 3.2 mA | 3 |
| RESET Output Voltage (low) | | | | 0.3 | V | VCC = 1 V, ISINK = 50 µA | 3 |
| Watchdog Timeout Period | tWD | 1 | 1.6 | 2.25 | sec | VIL = 0.4 V, VIH = VCC × 0.8, WDI = VCC | 3 |
| WDI Pulse Width | tWP | 50 | | | ns | | 3 |
| WDI Input Threshold, Logic Low | | | | 0.8 | V | | 3 |
| WDI Input Threshold, Logic High | | 3.5 | | | V | | 3 |
| WDI Input Current (high) | | 50 | | 150 | µA | WDI = 0 V | 3 |
| WDI Input Current (low) | | -150 | | -50 | µA | WDI = 0 V | 3 |
| MR Pull-Up Current | | 100 | 250 | 600 | µA | MR = 0 V | 3 |
| MR Pulse Width | | 150 | | | ns | | 3 |
| MR Input Threshold, Logic Low | | | | 0.8 | V | | 3 |
| MR Input Threshold, Logic High | | 2 | | | V | | 3 |
| MR to RESET Output Delay | | | | 250 | ns | | 3 |
| PFI Input Threshold | | 1.2 | 1.25 | 1.3 | V | | 3 |
| PFI Input Current | | -25 | 0.01 | 25 | nA | | 3 |
| PFO Output Voltage (low) | | | | 0.4 | V | ISINK = 3.2 mA | 3 |
| VCC Supply Voltage (absolute maximum) | VCC | -0.3 | | 6 | V | | 4 |
| All Other Inputs Voltage (absolute minimum) | | -0.3 | | | V | | 4 |
| Input Current, VCC pin | | | | 20 | mA | | 4 |
| Input Current, GND pin | | | | 20 | mA | | 4 |
| Digital Output Current | | | | 20 | mA | | 4 |
| Power Dissipation, R-8 SOIC | | | | 470 | mW | | 4 |
| Operating Temperature Range (Industrial, Version A) | | -40 | | 85 | °C | | 4 |
| Lead Temperature (Soldering, 10 sec) | | | | 300 | °C | | 4 |
| Lead Temperature, Vapor Phase (60 sec) | | | | 215 | °C | | 4 |
| Lead Temperature, Infrared (15 sec) | | | | 220 | °C | | 4 |
| Storage Temperature Range | | -65 | | 150 | °C | | 4 |
| ESD Rating | | 4.5 | | | kV | | 4 |
| Hysteresis, Reset Threshold | | | 40 | | mV | | 3 |
| Thermal Impedance θJA, R-8 SOIC | θJA | | 110 | | °C/W | | 4 |
## CAD (KiCad official)
- Symbol: `ADM706ARZ-REEL7`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `adm706arz-reel7-etched.step` / `adm706arz-reel7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adm706arz-reel7.step` / `adm706arz-reel7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588898898739924992) (12 pp, sha256 `61bcbb4abfdc3081`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adm706arz-reel7-datasheet.pdf)