# ADM693AARNZ

**Analog Devices** · Monitors & Reset Circuits · SOIC-16

ADM693AARNZ from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBATT | power_in | Backup battery input, connected to an external battery or capacitor, or to ground if no backup battery is used. |
| 2 | VOUT | power_out | Output voltage to which VCC or VBATT is internally switched (whichever is higher), supplying up to 250 mA; connect to VCC if no backup battery is used. |
| 3 | VCC | power_in | +5 V power supply input. |
| 4 | GND | power_in | 0 V ground reference for all signals. |
| 5 | BATT ON | output | Logic output that goes high when VOUT is switched to VBATT and low when switched to VCC; can drive an external PNP base via a resistor to exceed the 250 mA VOUT rating. |
| 6 | LOW LINE | output | Logic output that goes low when VCC falls below the reset threshold and returns high as soon as VCC rises above it. |
| 7 | OSC IN | input | Oscillator input that selects 100 ms (low) or 1.6 s (floating) watchdog timeout with the internal oscillator, or accepts an external clock or capacitor to GND when OSC SEL is low. |
| 8 | OSC SEL | input | Oscillator select input with 10 µA internal pullup; floating or high enables the internal oscillator, low enables the external OSC IN timing. |
| 9 | PFI | input | Noninverting power fail comparator input with 1.25 V threshold; PFO goes low when PFI is below 1.25 V; connect to GND or VOUT when unused. |
| 10 | PFO | output | Power fail comparator output that goes low when PFI is less than 1.25 V. |
| 11 | WDI | input | Three-level watchdog input; RESET pulses and WDO goes low if WDI stays high or low longer than the timeout, and the watchdog is disabled if WDI floats or is at midsupply. |
| 12 | CEOUT | output | Chip enable output that goes low only when CEIN is low and VCC is above the reset threshold; if CEIN is low at reset assertion it stays low for 15 µs or until CEIN goes high. |
| 13 | CEIN | input | Chip enable gating input; connect to GND or VOUT if not used. |
| 14 | WDO | output | Watchdog logic output that goes low if WDI stays high or low longer than the watchdog timeout and is set high by the next WDI transition. |
| 15 | ~{RESET} | output | Logic output that goes low if VCC falls below the reset threshold and remains low for 200 ms typ after VCC rises above it. |
| 16 | RESET | output | Open-drain logic output that is the inverse of the pin 15 RESET output. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-16 |
| Category | Power Supply Chip |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC, VBATT Operating Voltage Range |  | 0 |  | 5.5 | V | Either VCC or VBATT can be 0 V if the other > +2.0 V | 2 |
| Reset Voltage Threshold ADM693A |  | 4.25 | 4.4 | 4.5 | V | ADM693A, ADM800M | 2 |
| VCC to VOUT Output Resistance |  |  | 0.8 | 1.2 | Ω | VCC = 4.5 V | 2 |
| Supply Current (Excludes IOUT) |  |  | 70 | 100 | µA | VCC > (VBATT, 1 V) | 2 |
| Supply Current in Battery Backup (Excludes IOUT) |  |  | 0.04 | 1 | µA | VCC < (VBATT, 1.2 V), VBATT = 2.8 V | 2 |
| Battery Standby Current |  | -0.1 |  | 0.02 | µA | (VBATT +0.2 V) < VCC, TA = +25°C | 2 |
| Battery Standby Current |  | -1 |  | 0.02 | µA | (VBATT +0.2 V) < VCC | 2 |
| Reset Timeout Period Internal Oscillator |  | 140 | 200 | 280 | ms | Power Up | 2 |
| Watchdog Timeout Period, Internal Oscillator, Long Period |  | 1 | 1.6 | 2.25 | s | Long Period | 2 |
| Watchdog Timeout Period, Internal Oscillator, Short Period |  | 70 | 100 | 140 | ms | Short Period | 2 |
| PFI Input Threshold ADM69xA |  | 1.2 | 1.25 | 1.3 | V | VCC = 5 V | 2 |
| CEIN to CEOUT Resistance |  |  | 40 | 150 | Ω | Enable Mode | 3 |
| CEIN to CEOUT Propagation Delay |  |  | 6 | 10 | ns | RIN = 50 Ω, CLOAD = 50 pF | 3 |
| CEOUT Short-Circuit Current |  | 0.1 | 0.75 | 2 | mA | Disable Mode, CEOUT = 0 V | 3 |
| VCC Supply Voltage | VCC | -0.3 |  | 6 | V | TA = 25°C | 3 |
| VBATT Voltage | VBATT | -0.3 |  | 6 | V | TA = 25°C | 3 |
| Operating Temperature Range, Industrial (A Version) |  | -40 |  | 85 | °C |  | 3 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 3 |
| Power Dissipation, R-16 Narrow SOIC |  |  |  | 700 | mW | TA = 25°C | 3 |
| Thermal Impedance θJA, R-16 Narrow SOIC | θJA |  | 110 |  | °C/W | Printed as '110°W' | 3 |
| Input Current VCC (Peak) |  |  |  | 1000 | mA |  | 3 |
| Input Current VCC (Continuous) |  |  |  | 250 | mA |  | 3 |
| Lead Temperature (Soldering, 10 sec) |  |  |  | 300 | °C |  | 3 |

## CAD (KiCad official)

- Symbol: `ADM693AARNZ`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `adm693aarnz-etched.step` / `adm693aarnz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adm693aarnz.step` / `adm693aarnz.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADM691A_693A_800LM.pdf) (12 pp, sha256 `21aaacfd42c57a27`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/adm693aarnz-datasheet.pdf)