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ADM691ARZ

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Analog Devices Monitors & Reset Circuits, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADM691ARZ

Analog Devices · Monitors & Reset Circuits · SOIC-16

ADM691ARZ from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBATT power_in Backup battery input; connect to an external battery or capacitor, or to ground if no backup battery is used.
2 VOUT power_out Output voltage switched internally from VCC or VBATT, whichever is at the higher potential; connect to VCC if no backup battery is used.
3 VCC power_in Power supply input, +5 V; the VCC operating voltage range is 0 V to 5.5 V.
4 GND power_in 0 V ground reference for all signals.
5 BATT ON output Logic output that goes high when VOUT is switched to VBATT and low when VOUT is switched to VCC; it can drive an external PNP base through a resistor.
6 LOW LINE output Logic output that goes low when VCC falls below the reset threshold and returns high as soon as VCC rises above it.
7 OSC IN input Oscillator logic input; with OSC SEL high or floating, low selects the 100 ms and floating selects the 1.6 s watchdog timeout, and with OSC SEL low it accepts an external clock or timing capacitor.
8 OSC SEL input Oscillator select input with a 10 µA internal pullup; when low, the external oscillator input OSC IN is enabled.
9 PFI input Power fail input to the noninverting power fail comparator, which drives PFO low when PFI is below 1.25 V; connect to GND or VOUT when unused.
10 PFO output Power fail comparator output that goes low when PFI is less than 1.25 V.
11 WDI input Three-level watchdog input; if it stays high or low longer than the watchdog timeout period, RESET pulses low and WDO goes low, and the watchdog is disabled when WDI is floating or at midsupply.
12 CEOUT output Chip enable output that goes low only when CEIN is low and VCC is above the reset threshold.
13 CEIN input Chip enable input to the CE gating circuit; connect to GND or VOUT if not used.
14 WDO output Watchdog output that goes low if WDI is not toggled within the watchdog timeout period and is set high by the next WDI transition.
15 RESET output Active-low reset output that goes low when VCC falls below the reset threshold and remains low for 200 ms typical after VCC rises above it.
16 RESET output Open-drain output that is the inverse of RESET (active-high reset).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16
Category Power Supply Chip
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC, VBATT Operating Voltage Range VCC, VBATT 0 5.5 V 2
Reset Voltage Threshold (ADM691A, ADM800L) 4.5 4.65 4.75 V 2
Reset Timeout Period, Internal Oscillator 140 200 280 ms Power Up 2
Watchdog Timeout Period, Internal Oscillator (Long Period) 1 1.6 2.25 s Long Period 2
Watchdog Timeout Period, Internal Oscillator (Short Period) 70 100 140 ms Short Period 2
Minimum WDI Input Pulse Width 100 ns VIL = 0.4, VIH = 0.75 × VCC 2
WDI Input Threshold, Logic Low 0.8 V 2
WDI Input Current -50 -10 µA WDI = 0 V 2
WDI Input Current 20 50 µA WDI = VOUT 2
PFI Input Threshold (ADM69xA) 1.2 1.25 1.3 V VCC = 5 V 2
PFI Input Current -25 25 nA 2
PFO Output Voltage 0.4 V ISINK = 3.2 mA 2
PFO Output Voltage 3.5 V ISOURCE = 1 µA 2
PFO Short Circuit Source Current 1 15 100 µA 2
Supply Current (Excludes IOUT) 70 100 µA VCC > (VBATT, 1 V) 2
Supply Current in Battery Backup (Excludes IOUT) 0.04 1 µA VCC < (VBATT, 1.2 V), VBATT = 2.8 V 2
Battery Standby Current (+ = Discharge,, = Charge) -0.1 0.02 µA (VBATT +0.2 V) < VCC, TA = +25°C 2
Battery Standby Current (+ = Discharge,, = Charge) -1 0.02 µA (VBATT +0.2 V) < VCC 2
VCC to VOUT Output Resistance 0.8 1.2 Ω VCC = 4.5 V 2
VBATT to VOUT Output Resistance 12 Ω VBATT = 4.5 V 2
BATT ON Output Voltage Low 0.1 0.4 V ISINK = 3.2 mA 2
BATT ON Output Voltage Low 0.7 1.5 V ISINK = 25 mA 2
BATT ON Output Short Circuit Current (Source) 1 15 100 µA Source Current 2
RESET Output Voltage 0.004 0.3 V ISINK = 50 µA, VCC = 1 V, VBATT = 0 V 2
RESET Output Voltage 0.1 0.4 V ISINK = 3.2 mA, VCC = 4.25 V 2
RESET Output Voltage 3.5 V ISOURCE = 1.6 mA, VCC = 5 V 2
RESET Output Short Circuit Current 7 20 mA 2
RESET Output Voltage Low 0.1 0.4 V ISINK = 3.2 mA 2
LOW LINE Output Voltage 0.4 V ISINK = 3.2 mA, VCC = 4.25 V 2
LOW LINE Output Voltage 3.5 V ISOURCE = 1 µA, VCC = 5 V 2
LOW LINE Short Circuit Source Current 1 15 100 µA 2
WDO Output Voltage 0.4 V ISINK = 3.2 mA, VCC = 4.25 V 2
WDO Output Voltage 3.5 V ISOURCE = 500 µA, VCC = 5 V 2
WDO Short Circuit Source Current 3 10 mA 2
CEIN Leakage Current -1 0.005 1 µA Disable Mode 3
CEIN to CEOUT Resistance 40 150 Ω Enable Mode 3
CEIN to CEOUT Propagation Delay 6 10 ns RIN = 50 Ω, CLOAD = 50 pF 3
CEOUT Short-Circuit Current 0.1 0.75 2 mA Disable Mode, CEOUT = 0 V 3
CEOUT Output Voltage 3.5 V VCC = 5 V, IOUT = -100 µA 3
CEOUT Output Voltage 2.7 V VCC = 0 V, VBATT = 2.8 V, IOUT = 1 µA 3
OSC IN Input Current -5 0.1 5 µA OSC SEL = 0 V 3
OSC IN Input Pullup Current 10 100 µA OSC SEL = VOUT or Floating 3
OSC SEL Input Pullup Current 10 100 µA OSC SEL = 0 V 3
OSC IN Frequency Range 500 kHz OSC SEL = 0 V 3
VCC Supply Voltage VCC -0.3 6 V 3
VBATT Supply Voltage VBATT -0.3 6 V 3
VCC Input Current (Peak) 1000 mA 3
VCC Input Current (Continuous) 250 mA 3
VBATT Input Current (Peak) 250 mA 3
VBATT Input Current (Continuous) 25 mA 3
GND, BATT ON Input Current 100 mA 3
Digital Output Current 25 mA 3
Power Dissipation, R-16 Narrow SOIC 700 mW 3
Power Dissipation, R-16 Wide SOIC 762 mW 3
Operating Temperature Range (Industrial, A Version) -40 85 °C Industrial (A Version) 3
Storage Temperature Range -65 150 °C 3
Lead Temperature (Soldering, 10 sec) 300 °C 3
BATT ON Output Short Circuit Current (Sink) 60 mA Sink Current 2
θJA Thermal Impedance, R-16 Narrow SOIC θJA 110 °C/W 3
θJA Thermal Impedance, R-16 Wide SOIC θJA 110 °C/W 3

CAD (KiCad official)

  • Symbol: ADM691ARZ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: adm691arz-etched.step / adm691arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adm691arz.step / adm691arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 21aaacfd42c57a27, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF