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Contents

README

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ADM4168EBRUZ-RL7

Analog Devices · RS-485/RS-422 ICs · TSSOP-16

ADM4168EBRUZ-RL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B1 input Inverting receiver input B of transceiver 1, with ±15 kV HBM ESD protection and a −7 V to +7 V common-mode range.
2 A1 input Noninverting receiver input A of transceiver 1, with ±15 kV HBM ESD protection and a −7 V to +7 V common-mode range.
3 RO1 output Receiver output of transceiver 1, which goes high when the inputs are open (fail-safe).
4 DE1 input Driver output enable for transceiver 1: logic high enables driver outputs Y1 and Z1, logic low places them in high impedance.
5 RO2 output Receiver output of transceiver 2, which goes high when the inputs are open (fail-safe).
6 A2 input Noninverting receiver input A of transceiver 2, with ±15 kV HBM ESD protection and a −7 V to +7 V common-mode range.
7 B2 input Inverting receiver input B of transceiver 2, with ±15 kV HBM ESD protection and a −7 V to +7 V common-mode range.
8 GND power_in Ground.
9 DI2 input Driver input of transceiver 2: with the driver enabled, a logic low forces Y2 low and Z2 high, and a logic high forces Y2 high and Z2 low.
10 Y2 tri_state Noninverting driver output Y of transceiver 2, high impedance when DE2 is low, with ±15 kV HBM ESD protection.
11 Z2 tri_state Inverting driver output Z of transceiver 2, high impedance when DE2 is low, with ±15 kV HBM ESD protection.
12 DE2 input Driver output enable for transceiver 2: logic high enables driver outputs Y2 and Z2, logic low places them in high impedance.
13 Z1 tri_state Inverting driver output Z of transceiver 1, high impedance when DE1 is low, with ±15 kV HBM ESD protection.
14 Y1 tri_state Noninverting driver output Y of transceiver 1, high impedance when DE1 is low, with ±15 kV HBM ESD protection.
15 DI1 input Driver input of transceiver 1: with the driver enabled, a logic low forces Y1 low and Z1 high, and a logic high forces Y1 high and Z1 low.
16 VCC power_in Power supply, 5 V ± 10% (4.5 V to 5.5 V).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category Communication Interface Chip/UART/485/232
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply current total package ICC 4 6 mA No load, drivers enabled; VI = VCC or GND 3
Supply current total package ICC 5 9 mA No load, drivers enabled; VI = 2.4 V or 0.5 V 3
Input clamp voltage VIK -1.5 V II = -18 mA 3
Driver output voltage high VOH 2.4 3.5 V VIH = 2 V, VIL = 0.8 V, IOH = -20 mA 3
Driver output voltage low VOL 0.2 0.4 V VIH = 2 V, VIL = 0.8 V, IOL = 20 mA 3
Differential output voltage no load /VOD1/ 6 V IO = 0 mA 3
Differential output voltage loaded /VOD2/ 2 3.7 V RL = 100 Ω 3
Delta /VOD/ complementary output states ∆/VOD/ -0.4 0.4 V RL = 100 Ω 3
Common-mode output voltage VOC 3 V RL = 100 Ω 3
Delta /VOC/ complementary output states Δ/VOC/ -0.4 0.4 V RL = 100 Ω 3
Output leakage current IO 100 µA DEx = 0 V, VCC = 0 V or 5 V, VO = 6 V 3
Output leakage current IO -100 µA DEx = 0 V, VCC = 0 V or 5 V, VO = -0.25 V 3
Output short-circuit current IOS -150 -30 mA VO = VCC or GND 3
Driver input capacitance CI 6 pF 3
Logic input voltage high VIH 2 V 3
Logic input voltage low VIL 0.8 V 3
Logic input current high IIH 1 µA VI = VCC or VIH 3
Logic input current low IIL -1 µA VI = GND or VIL 3
Differential input threshold voltage VTH -200 200 mV 3
Input voltage hysteresis VHYS 60 mV 3
Receiver input current II 1.5 mA VI = 7 V, other input at 0 V 3
Receiver input current II -2.5 mA VI = -7 V, other input at 0 V 3
Line input resistance RIN 12 30 kΩ VIC = -7 V to +7 V, other input at 0 V 3
Receiver output voltage high VOH 3.8 4.2 V VID = 200 mV, IOH = -6 mA 3
Receiver output voltage low VOL 0.1 0.3 V VID = -200 mV, IOL = 6 mA 3
Driver maximum data rate DRATE 30 Mbps R1, R2 = 50 Ω; R3 = 500 Ω; C1, C2, C3 = 40 pF 4
Driver propagation delay tDPLH, tDPHL 8 16 ns S1 open 4
Driver output skew tSK 1.5 4 ns S1 open 4
Driver rise/fall time tDR, tDF 5 10 ns S1 open 4
Driver enable time tZH, tZL 10 19 ns S1 closed 4
Driver disable time tHZ, tLZ 7 16 ns S1 closed 4
Receiver propagation delay tRPLH, tRPHL 9 15 27 ns CL = 50 pF 4
Receiver transition time tTLH, tTHL 4 9 ns VIC = 0 V, CL = 50 pF 4
Supply voltage VCC -0.3 7 V 5
Digital input voltage (DE1, DE2) -0.3 7 V 5
Driver input voltage (DI1, DI2) -0.3 7 V 5
Driver output voltage (Y, Z) -0.3 7 V 5
Receiver input voltage (A, B) -14 14 V 5
Digital I/O voltage transient to GND -2 8 V for 10 ms 5
Driver output voltage transient to GND -2 8 V for 10 ms 5
Operating temperature range -40 85 °C 5
Storage temperature range -65 150 °C 5
ESD HBM on Ax, Bx, Yx, Zx -15 15 kV 5
ESD IEC 61000-4-2 contact discharge -8 8 kV 5
ESD IEC 61000-4-2 air discharge -8 8 kV 5
Thermal resistance junction to ambient θJA 113 °C/W RU-16 5
Supply voltage VCC 4.5 5 5.5 V 5 V ± 10% 3

CAD (KiCad official)

  • Symbol: ADM4168EBRUZ-RL7
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: adm4168ebruz-rl7-etched.step / adm4168ebruz-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adm4168ebruz-rl7.step / adm4168ebruz-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 272a16dea31cc77c, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF