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ADM3065ETRMZ-EP

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Analog Devices RS-485/RS-422 ICs, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ADM3065ETRMZ-EP

Analog Devices · RS-485/RS-422 ICs · MSOP-8

ADM3065ETRMZ-EP from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver Output Data: this output is high when (A − B) ≥ −30 mV and low when (A − B) ≤ −200 mV, and it is tristated when the receiver is disabled (RE driven high).
2 RE input Receiver Enable Input: this active-low input enables the receiver when driven low and disables it when driven high.
3 DE input Driver Enable: a high level enables the driver differential outputs A and B, and a low level places the driver output into a high impedance state.
4 DI input Transmit Data Input: data to be transmitted by the driver is applied to this input.
5 GND power_in Ground.
6 A bidirectional Noninverting Driver Output and Receiver Input: when the driver is disabled or VCC is powered down, Pin A is put into a high impedance state to avoid overloading the bus.
7 B bidirectional Inverting Driver Output and Receiver Input: when the driver is disabled or VCC is powered down, Pin B is put into a high impedance state to avoid overloading the bus.
8 VCC power_in 3.0 V to 5.5 V Power Supply: a 0.1 µF decoupling capacitor between the VCC pin and the GND pin is recommended.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-8
Category Communication Interface Chip/UART/485/232
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
No Load Supply Current ICC 2 7.5 mA DE = VIO, RE = 0 V 4
No Load Supply Current ICC 7.5 mA DE = VIO, RE = VIO 4
No Load Supply Current ICC 4.5 mA DE = 0 V, RE = 0 V 4
Supply Current, Data Rate = 50 Mbps ICC 107 172 mA VCC > 4.5 V, RL = 54 Ω, DE = VIO, RE = 0V 4
Supply Current, Data Rate = 50 Mbps ICC 67 75 mA RL = 54 Ω, DE = VIO, RE = 0 V (VCC = 3.0 V) 4
Supply Current in Shutdown Mode ISHDN 210 450 µA DE = 0 V, RE = VIO 4
Output Voltage, Loaded /VOD2/ 2 V VCC ≥ 3.0 V, RL = 50 Ω, see Figure 29 4
Output Voltage, Loaded /VOD2/ 1.5 V VCC ≥ 3.0 V, RL = 27 Ω (RS-485), see Figure 29 4
Output Voltage, Loaded /VOD2/ 2.1 V VCC ≥ 4.5 V, RL = 50 Ω, see Figure 29 4
Output Voltage, Loaded (common-mode range) /VOD3/ 1.5 V VCC ≥ 3.0 V, −7 V ≤ VCM ≤ +12 V, see Figure 30 4
Output Voltage, Loaded (common-mode range) /VOD3/ 2.1 V VCC ≥ 4.5 V, −7 V ≤ VCM ≤ +12 V, see Figure 30 4
Change in Differential Input Voltage for Complementary Output States ∆/VOD/ 0.2 V RL = 27 Ω or 50 Ω, see Figure 29 4
Common-Mode Output Voltage VOC 3 V RL = 27 Ω or 50 Ω, see Figure 29 4
Change in Common-Mode Voltage for Complementary Output States ∆/VOC/ 0.2 V RL = 27 Ω or 50 Ω, see Figure 29 4
Output Short-Circuit Current IOS -250 250 mA −7 V < VOUT < +12 V 4
Logic Input Current II -2 2 µA DE, RE, DI, 1.62 V ≤ VIO ≤ 5.5 V, 0 V ≤ VIN ≤ VIO 4
Differential Input Threshold Voltage VTH -200 -125 -30 mV −7 V < VCM < +12 V 4
Input Voltage Hysteresis VHYS 30 mV −7 V < VCM < +12 V 4
Input Current (A, B) II 0.25 mA DE = 0 V, VCC = powered/unpowered, VIN = 12 V 4
Input Current (A, B) II -0.2 mA DE = 0 V, VCC = powered/unpowered, VIN = −7 V 4
Line Input Resistance RIN 48 kΩ −7 V ≤ VCM ≤ +12 V 4
Output Voltage Low VOL 0.4 V VIO = 3.6 V, IOUT = 2 mA, VID1 ≤ −0.2 V 4
Output Voltage High VOH 2.4 V VIO = 3.0 V, IOUT = −2 mA, VID1 ≥ −0.03 V 5
Short-Circuit Current 85 mA VOUT = GND or VIO 5
Three-State Output Leakage IOZR -2 2 µA RO = 0 V or VIO 5
Propagation Delay (driver) tDPLH, tDPHL 9 15 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 4 and Figure 31 5
Skew (driver) tDSKEW 1 2 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 4 and Figure 31 5
Rise/Fall Times tDR, tDF 4 6.7 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 4 and Figure 31 5
Enable to Output High tDZH 10 30 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 32 5
Enable to Output Low tDZL 10 30 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 32 5
Disable Time from Low tDLZ 10 30 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 32 5
Disable Time from High tDHZ 10 30 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 32 5
Enable Time from Shutdown to High tDZH(SHDN) 2000 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 32 5
Enable Time from Shutdown to Low tDZL(SHDN) 2000 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 32 5
Propagation Delay (receiver) tRPLH, tRPHL 35 ns CL = 15 pF, /VID/ ≥ 1.5 V, VCM = 1.5 V, see Figure 6 and Figure 33 5
Skew/Pulse Width Distortion (receiver) tRSKEW 3.5 ns CL = 15 pF, /VID/ ≥ 1.5 V, VCM = 1.5 V, see Figure 6 and Figure 33 5
Enable to Output High (receiver) tRZH 10 35 ns RL = 1 kΩ, CL = 15 pF, /VID/ ≥ 1.5 V, DE high, see Figure 7 and Figure 35 5
Enable to Output Low (receiver) tRZL 10 35 ns RL = 1 kΩ, CL = 15 pF, /VID/ ≥ 1.5 V, DE high, see Figure 7 and Figure 35 5
Disable Time from Low (receiver) tRLZ 10 35 ns RL = 1 kΩ, CL = 15 pF, /VID/ ≥ 1.5 V, see Figure 7 and Figure 35 5
Disable Time from High (receiver) tRHZ 10 35 ns RL = 1 kΩ, CL = 15 pF, /VID/ ≥ 1.5 V, see Figure 7 and Figure 35 5
Enable from Shutdown to High (receiver) tRZH(SHDN) 2000 ns RL = 1 kΩ, CL = 15 pF, /VID/ ≥ 1.5 V, see Figure 7 and Figure 34 5
Enable from Shutdown to Low (receiver) tRZL(SHDN) 2000 ns RL = 1 kΩ, CL = 15 pF, /VID/ ≥ 1.5 V, see Figure 7 and Figure 34 5
Time to Shutdown tSHDN 40 ns 5
VCC to GND VCC 6 V 8
Driver Output and Receiver Input Voltage -9 14 V 8
Operating Temperature Range -55 125 °C 8
Storage Temperature Range -65 150 °C 8
Continuous Total Power Dissipation PD 0.151 W 8-Lead MSOP 8
Maximum Junction Temperature TJ 150 °C 8
ESD on Bus Pins, IEC 61000-4-2 Contact Discharge -12 12 kV Bus pins (A, B, Y, Z) 8
ESD on Bus Pins, IEC 61000-4-2 Air Discharge -15 15 kV Bus pins (A, B, Y, Z) 8
ESD Human Body Model, All Other Pins -8 8 kV All other pins 8
Supply Voltage VCC 3 5.5 V VIO = VCC for ADM3065E-EP, TA = TMIN to TMAX 4
Thermal Resistance, Junction to Ambient (RM-8) θJA 165.69 °C/W 8-lead MSOP (RM-8), JEDEC 2S2P board 8
Thermal Resistance, Junction to Case (RM-8) θJC 49.61 °C/W 8-lead MSOP (RM-8) 8

CAD (KiCad official)

  • Symbol: ADM3065ETRMZ-EP
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: adm3065etrmz-ep-etched.step / adm3065etrmz-ep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adm3065etrmz-ep.step / adm3065etrmz-ep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 576e8e061709aa21, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF