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ADM3061EBRZ-R7

Analog Devices · RS-485/RS-422 ICs · SOIC-8

ADM3061EBRZ-R7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output data, high when (A − B) ≥ −30 mV and low when (A − B) ≤ −200 mV, tristated when RE is driven high.
2 RE input Active-low receiver enable input; driving low enables the receiver and driving high disables it.
3 DE input Driver enable; a high level enables driver outputs A and B, a low level places them in high impedance.
4 DI input Transmit data input; data to be transmitted by the driver is applied to this pin.
5 GND power_in Ground.
6 A bidirectional Noninverting driver output and receiver input, high impedance when the driver is disabled or VCC is powered down.
7 B bidirectional Inverting driver output and receiver input, high impedance when the driver is disabled or VCC is powered down.
8 VCC power_in 3.0 V to 5.5 V power supply; a 0.1 µF decoupling capacitor to GND is recommended.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Communication Interface Chip/UART/485/232
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
No Load Supply Current ICC 3.5 7.5 mA DE = VIO, RE = 0 V 4
No Load Supply Current ICC 3 4.5 mA DE = 0 V, RE = 0 V 4
Supply Current, Data Rate = 500 kbps ICC 100 165 mA RL = 54 Ω, DE = VIO, RE = 0 V (VCC ≥ 4.5 V) 4
Supply Current, Data Rate = 500 kbps ICC 56 74 mA RL = 54 Ω, DE = VIO, RE = 0 V (VCC = 3.0 V) 4
Supply Current in Shutdown Mode ISHDN 210 450 µA DE = 0 V, RE = VIO 4
Output Voltage, Loaded /VOD2/ 2 2.5 V VCC ≥ 3.0 V, RL = 50 Ω, see Figure 38 4
Output Voltage, Loaded /VOD2/ 1.5 2.1 V VCC ≥ 3.0 V, RL = 27 Ω (RS-485), see Figure 38 4
Output Voltage, Loaded /VOD2/ 2.1 3.5 V VCC ≥ 4.5 V, RL = 50 Ω, see Figure 38 4
Output Voltage, Loaded /VOD2/ 2.1 3 V VCC ≥ 4.5 V, RL = 27 Ω (RS-485), see Figure 38 4
Change in Differential Output Voltage for Complementary Output States ∆/VOD/ 0.2 V RL = 27 Ω or 50 Ω, see Figure 38 4
Common-Mode Output Voltage VOC 1.6 3 V RL = 27 Ω or 50 Ω, see Figure 38 4
Change in Common-Mode Voltage for Complementary Output States ∆/VOC/ 0.2 V RL = 27 Ω or 50 Ω, see Figure 38 4
Output Short-Circuit Current IOS -250 250 mA −7 V < VOUT < +12 V 4
Output Leakage (Y, Z) IO 100 µA DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V 4
Output Leakage (Y, Z) IO -100 µA DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VIN = −7 V 4
Logic Input Voltage Low VIL 0.33 ×VIO DE, RE, DI, 1.62 V ≤ VIO ≤ 5.5 V 4
Logic Input Voltage High VIH 0.67 ×VIO DE, RE, DI, 1.62 V ≤ VIO ≤ 5.5 V 4
Logic Input Current II -2 2 µA DE, RE, DI, 1.62 V ≤ VIO ≤ 5.5 V, 0 V ≤ VIN ≤ VIO 4
Differential Input Threshold Voltage VTH -200 -125 -30 mV −7 V < VCM < +12 V 4
Input Voltage Hysteresis VHYS 30 mV −7 V < VCM < +12 V 4
Input Current (A, B) II 0.1 0.25 mA DE = 0 V, VCC = powered/unpowered, VIN = 12 V 4
Input Current (A, B) II -0.2 -0.1 mA DE = 0 V, VCC = powered/unpowered, VIN = −7 V 4
Line Input Resistance RIN 48 96 kΩ −7 V ≤ VCM ≤ +12 V 4
Supply Voltage VCC 3 5.5 V Specification conditions 4
Operating Temperature (B grade) TA -40 125 °C TMIN to TMAX 4
VCC to GND VCC 6 V 8
Digital Input and Output Voltage (DE, RE, DI, RO) -0.3 V Max is VIO + 0.3 V (VIO = VCC on this part) 8
Driver Output and Receiver Input Voltage -9 14 V 8
Storage Temperature Range TSTG -65 150 °C 8
Continuous Total Power Dissipation, 8-Lead SOIC_N 0.225 W 8-Lead SOIC_N 8
Maximum Junction Temperature TJ 150 °C 8
Lead Temperature, Soldering 300 °C 10 sec 8
ESD IEC 61000-4-2 Contact Discharge, Bus Pins -12 12 kV A, B pins 8
ESD HBM, Bus Pins -30 30 kV A, B pins, printed ≥±30 kV 8
ESD HBM, All Other Pins -8 8 kV 8
Thermal Resistance Junction to Ambient, R-8 θJA 110.88 °C/W R-8 (8-lead SOIC_N), JEDEC 2S2P simulated 8
Thermal Resistance Junction to Case, R-8 θJC 58.63 °C/W R-8 (8-lead SOIC_N), JEDEC 2S2P simulated 8

CAD (KiCad official)

  • Symbol: ADM3061EBRZ-R7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adm3061ebrz-r7-etched.step / adm3061ebrz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adm3061ebrz-r7.step / adm3061ebrz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (25 pp, sha256 7ce4130f0f613a46, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF