component
ADM1192-1ARMZ-R7
Public Made by Adomby adom
Analog Devices Power Management Specialized - PMIC, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADM1192-1ARMZ-R7
Analog Devices · Power Management Specialized - PMIC · MSOP-10
ADM1192-1ARMZ-R7 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply input with an operating range of 3.15 V to 26 V, and an undervoltage lockout circuit resets the ADM1192 when a low supply voltage is detected. |
| 2 | SENSE | input | Current sense input; a sense resistor between VCC and SENSE generates a voltage proportional to load current, which the current sense amplifier amplifies before ADC digitization. |
| 3 | SETV | input | Overcurrent threshold input compared with the current sense amplifier output, where a lower SETV voltage causes ALERT to assert at a lower current level, with a typical response time of 1 µs to 2 µs. |
| 4 | GND | power_in | Chip ground pin. |
| 5 | TIMER | passive | Timer input where an external capacitor CTIMER sets the period for masking overcurrent conditions, which should be long enough for inrush current to charge the load without tripping a fault. |
| 6 | SCL | input | I2C clock pin that is an open-drain input and requires an external resistive pull-up. |
| 7 | SDA | bidirectional | I2C data I/O pin that is open-drain and requires an external resistive pull-up. |
| 8 | ADR | input | I2C address pin that can be tied low, tied high, left floating, or tied low through a resistor to set four I2C addresses. |
| 9 | CLRB | input | Clear pin where toggling it low clears a latched overcurrent condition, and holding it low disables the ALERT output. |
| 10 | ALERT | output | Active-high, open-drain alert output that asserts when an overcurrent condition is present and latches until cleared manually via the ALERT_EN register or the CLRB pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Power Supply Chip |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VCC | 3.15 | 26 | V | 3 | ||
| Supply Current | ICC | 1.7 | 2 | mA | 3 | ||
| Current Sense Absolute Accuracy | -1.45 | 1.45 | % | 0°C to +70°C; VSENSE = 75 mV | 3 | ||
| Current Sense Absolute Accuracy | -1.8 | 1.8 | % | 0°C to +70°C; VSENSE = 50 mV | 3 | ||
| Current Sense Absolute Accuracy | -2.8 | 2.8 | % | 0°C to +70°C; VSENSE = 25 mV | 3 | ||
| Current Sense Absolute Accuracy | -5.7 | 5.7 | % | 0°C to +70°C; VSENSE = 12.5 mV | 3 | ||
| Current Sense Absolute Accuracy | -1.5 | 1.5 | % | 0°C to +85°C; VSENSE = 75 mV | 3 | ||
| Current Sense Absolute Accuracy | -2.95 | 2.95 | % | 0°C to +85°C; VSENSE = 25 mV | 3 | ||
| Current Sense Absolute Accuracy | -6.1 | 6.1 | % | 0°C to +85°C; VSENSE = 12.5 mV | 3 | ||
| Current Sense Absolute Accuracy | -1.95 | 1.95 | % | -40°C to +85°C; VSENSE = 75 mV | 3 | ||
| Current Sense Absolute Accuracy | -2.45 | 2.45 | % | -40°C to +85°C; VSENSE = 50 mV | 3 | ||
| Current Sense Absolute Accuracy | -3.85 | 3.85 | % | -40°C to +85°C; VSENSE = 25 mV | 3 | ||
| Current Sense Absolute Accuracy | -6.7 | 6.7 | % | -40°C to +85°C; VSENSE = 12.5 mV | 3 | ||
| Voltage Sense Accuracy | -0.85 | 0.85 | % | 0°C to +70°C; VCC = 3.0 V to 5.5 V (low range) | 3 | ||
| Voltage Sense Accuracy | -0.9 | 0.9 | % | 0°C to +70°C; VCC = 10.8 V to 16.5 V (high range) | 3 | ||
| Voltage Sense Accuracy | -1.15 | 1.15 | % | -40°C to +85°C; VCC = 10.8 V to 16.5 V (high range) | 3 | ||
| Logic Low Threshold | VCLRBL | 0.8 | V | 3 | |||
| Input Current for Logic Low Input | ICLRBL | -40 | -22 | µA | VCLRB = 0 V to 0.8 V | 3 | |
| Logic High Threshold | VCLRBH | 1.6 | mV | 3 | |||
| Input Current for Logic High Input | ICLRBH | 3 | 6 | µA | VCLRB = 1.6 V to 5.5 V | 3 | |
| Input Current | ISENSE | -1 | 1 | µA | VSENSE = VCC | 3 | |
| Overcurrent Trip Threshold | 98 | 100 | 102 | mV | VSETV = 1.8 V | 3 | |
| Overcurrent Trip Threshold | 49.5 | 50 | 50.5 | mV | VSETV = 0.9 V | 3 | |
| Pull-Up Current (Overcurrent Fault) | ITIMERUPOC | -46 | -62 | -78 | µA | (18.125 × VSENSE) > VSETV, VTIMER = 1 V | 4 |
| Pin Threshold High | VTIMERH | 1.275 | 1.3 | 1.325 | V | TIMER rising | 4 |
| Output Low Voltage | VALERTOL | 0.05 | 0.1 | V | IALERT = -100 µA | 4 | |
| Output Low Voltage | VALERTOL | 1 | 1.5 | mA | IALERT = -2 mA | 4 | |
| Set Address to 00 (low state) | VADRLOWV | 0 | 0.8 | V | Low state | 4 | |
| Set Address to 01 (resistor to ground) | RADRLOWZ | 80 | 120 | 160 | kΩ | Resistor to ground state, load pin with specified resistance for 01 decode | 4 |
| Set Address to 10 (open state) | IADRHIGHZ | -0.3 | 0.3 | µA | Open state, maximum load allowed on ADR pin for 10 decode | 4 | |
| Set Address to 11 (high state) | VADRHIGHV | 2 | 5.5 | V | High state | 4 | |
| Input Current for 00 Decode | IADRLOW | -40 | -25 | µA | VADR = 0 V to 0.8 V | 4 | |
| Input Current for 11 Decode | IADRHIGH | 3 | 6 | µA | VADR = 2.0 V to 5.5 V | 4 | |
| Low Level Input Voltage | VIL | 0.3 | V | VBUS = 3.0 V to 5.5 V | 4 | ||
| High Level Input Voltage | VIH | 0.7 | V | VBUS = 3.0 V to 5.5 V | 4 | ||
| Low Level Output Voltage on SDA | VOL | 0.4 | V | IOL = 3 mA | 4 | ||
| Output Fall Time on SDA from VIHMIN to VILMAX | 250 | ns | CBUS = bus capacitance from SDA to GND | 4 | |||
| Maximum Width of Spikes Suppressed by Input Filtering on SDA and SCL | 50 | 250 | ns | 4 | |||
| Input Current, II, on SDA/SCL When Not Driving a Logic Low Output | II | -10 | 10 | µA | 4 | ||
| SCL Clock Frequency | fSCL | 400 | kHz | 4 | |||
| SDA Output Data Hold Time | tHD;DAT | 100 | 900 | ns | 4 | ||
| Capacitive Load for Each Bus Line | 400 | pF | 4 | ||||
| VCC Pin | 30 | V | 5 | ||||
| SENSE Pin | 30 | V | 5 | ||||
| TIMER Pin | -0.3 | 6 | V | 5 | |||
| CLRB Pin | -0.3 | 6 | V | 5 | |||
| SETV Pin | 30 | V | 5 | ||||
| ALERT Pin | 30 | V | 5 | ||||
| SDA Pin, SCL Pin | -0.3 | 6 | V | 5 | |||
| ADR Pin | -0.3 | 6 | V | 5 | |||
| Storage Temperature Range | -65 | 125 | °C | 5 | |||
| Operating Temperature Range | -40 | 85 | °C | 5 | |||
| Lead Temperature (Soldering) | 300 | °C | Soldering 10 sec | 5 | |||
| Junction Temperature | 150 | °C | 5 | ||||
| Thermal Resistance, 10-Lead MSOP | θJA | 137.5 | °C/W | Worst-case; device soldered in a circuit board (surface-mount) | 5 |
CAD (KiCad official)
- Symbol:
ADM1192-1ARMZ-R7 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
adm1192-1armz-r7-etched.step/adm1192-1armz-r7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adm1192-1armz-r7.step/adm1192-1armz-r7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
9f6ad6335e4f7891, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADM1192-1ARMZ-R7
**Analog Devices** · Power Management Specialized - PMIC · MSOP-10
ADM1192-1ARMZ-R7 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply input with an operating range of 3.15 V to 26 V, and an undervoltage lockout circuit resets the ADM1192 when a low supply voltage is detected. |
| 2 | SENSE | input | Current sense input; a sense resistor between VCC and SENSE generates a voltage proportional to load current, which the current sense amplifier amplifies before ADC digitization. |
| 3 | SETV | input | Overcurrent threshold input compared with the current sense amplifier output, where a lower SETV voltage causes ALERT to assert at a lower current level, with a typical response time of 1 µs to 2 µs. |
| 4 | GND | power_in | Chip ground pin. |
| 5 | TIMER | passive | Timer input where an external capacitor CTIMER sets the period for masking overcurrent conditions, which should be long enough for inrush current to charge the load without tripping a fault. |
| 6 | SCL | input | I2C clock pin that is an open-drain input and requires an external resistive pull-up. |
| 7 | SDA | bidirectional | I2C data I/O pin that is open-drain and requires an external resistive pull-up. |
| 8 | ADR | input | I2C address pin that can be tied low, tied high, left floating, or tied low through a resistor to set four I2C addresses. |
| 9 | CLRB | input | Clear pin where toggling it low clears a latched overcurrent condition, and holding it low disables the ALERT output. |
| 10 | ALERT | output | Active-high, open-drain alert output that asserts when an overcurrent condition is present and latches until cleared manually via the ALERT_EN register or the CLRB pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Power Supply Chip |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VCC | 3.15 | | 26 | V | | 3 |
| Supply Current | ICC | | 1.7 | 2 | mA | | 3 |
| Current Sense Absolute Accuracy | | -1.45 | | 1.45 | % | 0°C to +70°C; VSENSE = 75 mV | 3 |
| Current Sense Absolute Accuracy | | -1.8 | | 1.8 | % | 0°C to +70°C; VSENSE = 50 mV | 3 |
| Current Sense Absolute Accuracy | | -2.8 | | 2.8 | % | 0°C to +70°C; VSENSE = 25 mV | 3 |
| Current Sense Absolute Accuracy | | -5.7 | | 5.7 | % | 0°C to +70°C; VSENSE = 12.5 mV | 3 |
| Current Sense Absolute Accuracy | | -1.5 | | 1.5 | % | 0°C to +85°C; VSENSE = 75 mV | 3 |
| Current Sense Absolute Accuracy | | -2.95 | | 2.95 | % | 0°C to +85°C; VSENSE = 25 mV | 3 |
| Current Sense Absolute Accuracy | | -6.1 | | 6.1 | % | 0°C to +85°C; VSENSE = 12.5 mV | 3 |
| Current Sense Absolute Accuracy | | -1.95 | | 1.95 | % | -40°C to +85°C; VSENSE = 75 mV | 3 |
| Current Sense Absolute Accuracy | | -2.45 | | 2.45 | % | -40°C to +85°C; VSENSE = 50 mV | 3 |
| Current Sense Absolute Accuracy | | -3.85 | | 3.85 | % | -40°C to +85°C; VSENSE = 25 mV | 3 |
| Current Sense Absolute Accuracy | | -6.7 | | 6.7 | % | -40°C to +85°C; VSENSE = 12.5 mV | 3 |
| Voltage Sense Accuracy | | -0.85 | | 0.85 | % | 0°C to +70°C; VCC = 3.0 V to 5.5 V (low range) | 3 |
| Voltage Sense Accuracy | | -0.9 | | 0.9 | % | 0°C to +70°C; VCC = 10.8 V to 16.5 V (high range) | 3 |
| Voltage Sense Accuracy | | -1.15 | | 1.15 | % | -40°C to +85°C; VCC = 10.8 V to 16.5 V (high range) | 3 |
| Logic Low Threshold | VCLRBL | | | 0.8 | V | | 3 |
| Input Current for Logic Low Input | ICLRBL | -40 | | -22 | µA | VCLRB = 0 V to 0.8 V | 3 |
| Logic High Threshold | VCLRBH | 1.6 | | | mV | | 3 |
| Input Current for Logic High Input | ICLRBH | 3 | | 6 | µA | VCLRB = 1.6 V to 5.5 V | 3 |
| Input Current | ISENSE | -1 | | 1 | µA | VSENSE = VCC | 3 |
| Overcurrent Trip Threshold | | 98 | 100 | 102 | mV | VSETV = 1.8 V | 3 |
| Overcurrent Trip Threshold | | 49.5 | 50 | 50.5 | mV | VSETV = 0.9 V | 3 |
| Pull-Up Current (Overcurrent Fault) | ITIMERUPOC | -46 | -62 | -78 | µA | (18.125 × VSENSE) > VSETV, VTIMER = 1 V | 4 |
| Pin Threshold High | VTIMERH | 1.275 | 1.3 | 1.325 | V | TIMER rising | 4 |
| Output Low Voltage | VALERTOL | | 0.05 | 0.1 | V | IALERT = -100 µA | 4 |
| Output Low Voltage | VALERTOL | | 1 | 1.5 | mA | IALERT = -2 mA | 4 |
| Set Address to 00 (low state) | VADRLOWV | 0 | | 0.8 | V | Low state | 4 |
| Set Address to 01 (resistor to ground) | RADRLOWZ | 80 | 120 | 160 | kΩ | Resistor to ground state, load pin with specified resistance for 01 decode | 4 |
| Set Address to 10 (open state) | IADRHIGHZ | -0.3 | | 0.3 | µA | Open state, maximum load allowed on ADR pin for 10 decode | 4 |
| Set Address to 11 (high state) | VADRHIGHV | 2 | | 5.5 | V | High state | 4 |
| Input Current for 00 Decode | IADRLOW | -40 | | -25 | µA | VADR = 0 V to 0.8 V | 4 |
| Input Current for 11 Decode | IADRHIGH | 3 | | 6 | µA | VADR = 2.0 V to 5.5 V | 4 |
| Low Level Input Voltage | VIL | | | 0.3 | V | VBUS = 3.0 V to 5.5 V | 4 |
| High Level Input Voltage | VIH | 0.7 | | | V | VBUS = 3.0 V to 5.5 V | 4 |
| Low Level Output Voltage on SDA | VOL | | | 0.4 | V | IOL = 3 mA | 4 |
| Output Fall Time on SDA from VIHMIN to VILMAX | | | | 250 | ns | CBUS = bus capacitance from SDA to GND | 4 |
| Maximum Width of Spikes Suppressed by Input Filtering on SDA and SCL | | 50 | | 250 | ns | | 4 |
| Input Current, II, on SDA/SCL When Not Driving a Logic Low Output | II | -10 | | 10 | µA | | 4 |
| SCL Clock Frequency | fSCL | | | 400 | kHz | | 4 |
| SDA Output Data Hold Time | tHD;DAT | 100 | | 900 | ns | | 4 |
| Capacitive Load for Each Bus Line | | | | 400 | pF | | 4 |
| VCC Pin | | | | 30 | V | | 5 |
| SENSE Pin | | | | 30 | V | | 5 |
| TIMER Pin | | -0.3 | | 6 | V | | 5 |
| CLRB Pin | | -0.3 | | 6 | V | | 5 |
| SETV Pin | | | | 30 | V | | 5 |
| ALERT Pin | | | | 30 | V | | 5 |
| SDA Pin, SCL Pin | | -0.3 | | 6 | V | | 5 |
| ADR Pin | | -0.3 | | 6 | V | | 5 |
| Storage Temperature Range | | -65 | | 125 | °C | | 5 |
| Operating Temperature Range | | -40 | | 85 | °C | | 5 |
| Lead Temperature (Soldering) | | | | 300 | °C | Soldering 10 sec | 5 |
| Junction Temperature | | | | 150 | °C | | 5 |
| Thermal Resistance, 10-Lead MSOP | θJA | | 137.5 | | °C/W | Worst-case; device soldered in a circuit board (surface-mount) | 5 |
## CAD (KiCad official)
- Symbol: `ADM1192-1ARMZ-R7`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `adm1192-1armz-r7-etched.step` / `adm1192-1armz-r7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adm1192-1armz-r7.step` / `adm1192-1armz-r7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADM1192.pdf) (20 pp, sha256 `9f6ad6335e4f7891`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adm1192-1armz-r7-datasheet.pdf)